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author | Jim Wilson <jimw@sifive.com> | 2018-12-07 12:31:05 -0800 |
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committer | Jim Wilson <jimw@sifive.com> | 2018-12-07 12:31:05 -0800 |
commit | f50fabe4f66534c9addacddeaa439e8d164eadda (patch) | |
tree | 626e34486c1f82beb99131a9895c65e4c61c2ced /opcodes/ChangeLog | |
parent | 8bebfcda34f2ea883fa6b87e748ad8a5f72b352f (diff) | |
download | gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.zip gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.tar.gz gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.tar.bz2 |
RISC-V: Fix 4-arg add parsing.
PR gas/23956
gas/
* config/tc-riscv.c (validate_riscv_insn) <'1'>: New case.
(percent_op_null): New.
(riscv_ip) <'j'>: Set imm_reloc before p.
<'1'>: New case.
<'0'>: Use percent_op_null and don't set imm_reloc.
<alu_op>: Handle *args == '1'.
* testsuite/gas/riscv/tprel-add.d: New.
* testsuite/gas/riscv/tprel-add.l: New.
* testsuite/gas/riscv/tprel-add.s: New.
opcodes/
* riscv-opc.c (riscv_opcodes) <"add">: Use 1 not 0 for fourth arg.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r-- | opcodes/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5588e4b..880f863 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2018-12-07 Jim Wilson <jimw@sifive.com> + + PR gas/23956 + * riscv-opc.c (riscv_opcodes) <"add">: Use 1 not 0 for fourth arg. + 2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com> * configure.ac (enable-cgen-maint): Support passing path to cgen |