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| author | Jan Beulich <jbeulich@novell.com> | 2018-04-26 08:55:02 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-04-26 08:55:02 +0200 |
| commit | e2195274d4a0752459ea89ffbf50b2704fb0c0b4 (patch) | |
| tree | 5220d4b7d06406fe4278798d5d149fd08a253a78 /opcodes/ChangeLog | |
| parent | 7a69eac330adff3913a8698eac450cc7968ba8b0 (diff) | |
| download | gdb-e2195274d4a0752459ea89ffbf50b2704fb0c0b4.zip gdb-e2195274d4a0752459ea89ffbf50b2704fb0c0b4.tar.gz gdb-e2195274d4a0752459ea89ffbf50b2704fb0c0b4.tar.bz2 | |
x86: fold various non-memory operand AVX512VL templates
There's little point carrying up to three templates per insn flavor
when the sole difference is operand size and the dependency on AVX512VL
being enabled. Instead the need for AVX512VL can be derived from an
operand allowing for ZMMword as well as one or both or XMMword and
YMMword (irrespective of whether this is a register or memory operand).
Without further abstraction to deal with the different Disp8MemShift
values between the templates, only a limited set (mostly ones only
allowing for non-memory operands) can be folded, which is being done
here.
Also drop IgnoreSize wherever possible from anything that's being
touched anyway.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f733f19..be522a1 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2018-04-26 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl: Fold various non-memory operand AVX512VL + templates into their base ones. + * i386-tlb.h: Re-generate. + +2018-04-26 Jan Beulich <jbeulich@suse.com> + * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to |