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| author | Alexandre Oliva <aoliva@redhat.com> | 2003-07-10 02:53:27 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2003-07-10 02:53:27 +0000 |
| commit | 40fa02078b63a5cbca3b8700ba4b37dd0a48ce2b (patch) | |
| tree | 1e2eeacb08e53f3581accc61dfb443f99e264614 /opcodes/ChangeLog | |
| parent | b08fa4d3bf5914d746515f4f6ca560d7e900ec92 (diff) | |
| download | gdb-40fa02078b63a5cbca3b8700ba4b37dd0a48ce2b.zip gdb-40fa02078b63a5cbca3b8700ba4b37dd0a48ce2b.tar.gz gdb-40fa02078b63a5cbca3b8700ba4b37dd0a48ce2b.tar.bz2 | |
2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands. Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3. Print out FP register names.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b1b6619..84c15ec 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,26 @@ +2003-07-09 Alexandre Oliva <aoliva@redhat.com> + + 2000-05-25 Alexandre Oliva <aoliva@cygnus.com> + * m10300-dis.c (disassemble): Negate negative accumulator's shift. + 2000-05-24 Alexandre Oliva <aoliva@cygnus.com> + * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume + 32-bit longs when sign-extending operands. + 2000-04-20 Alexandre Oliva <aoliva@cygnus.com> + * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs. + * m10300-dis.c (HAVE_AM33_2): Define. + (disassemble): Use it. + (HAVE_AM33): Redefine. + (print_insn_mn10300): Fix mask for 5-byte extended insns. + 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> + * m10300-opc.c: Renamed AM332 to AM33_2. + 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> + * m10300-opc.c: Defined AM33 2.0 register operands. Added support + for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and + bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns. + * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended + insn code of AM33 2.0. + (disassemble): Recognize FMT_D3. Print out FP register names. + 2003-07-09 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (set_default_mips_dis_options): Get BFD from |