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authorAndrew Cagney <cagney@redhat.com>2003-05-07 19:21:13 +0000
committerAndrew Cagney <cagney@redhat.com>2003-05-07 19:21:13 +0000
commitf6684c317073868d91f0659501fe08215784ab9d (patch)
treefc1df2d7ada9293c1901b48f662cff97f8908c3a /mmalloc
parent0f3538e70eb350657bc4431329ad6a51ce9503da (diff)
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Index: gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com> * d10v-tdep.c (remote_d10v_translate_xfer_address): Add "regcache". (d10v_print_registers_info): Update. (d10v_dmap_register, d10v_imap_register): Delete functions. (struct gdbarch_tdep): Add "regcache" parameter to "dmap_register" and "imap_register". (d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache". (d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache". * arch-utils.c (generic_remote_translate_xfer_address): Add "regcache" and "gdbarch" parameters. * gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache" parameter. Change class to multi-arch. * gdbarch.h, gdbarch.c: Re-generate. * remote.c (remote_xfer_memory): Use gdbarch_remote_translate_xfer_address. Index: include/gdb/ChangeLog 2003-05-07 Andrew Cagney <cagney@redhat.com> * sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter. (sim_d10v_translate_imap_addr): Add regcache parameter. (sim_d10v_translate_dmap_addr): Ditto. Index: sim/d10v/ChangeLog 2003-05-07 Andrew Cagney <cagney@redhat.com> * interp.c (sim_d10v_translate_addr): Add "regcache" parameter. (sim_d10v_translate_imap_addr): Ditto. (sim_d10v_translate_dmap_addr): Ditto. (xfer_mem): Pass NULL regcache to sim_d10v_translate_addr. (dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr. (dmap_register, imap_register): Add "regcache" parameter. (imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr. (sim_fetch_register): Pass NULL regcache to imap_register and dmap_register.
Diffstat (limited to 'mmalloc')
0 files changed, 0 insertions, 0 deletions