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authorIan Lance Taylor <ian@airs.com>1996-11-26 18:12:44 +0000
committerIan Lance Taylor <ian@airs.com>1996-11-26 18:12:44 +0000
commit831f59a2189abfc5d321523c64474e9f04a2ddbe (patch)
tree3a3faa6e5d791306c1cb1f3160fd8d4ea262e05b /mmalloc
parent8a1aafab2e783f36b18d1b140b1e6710ac8186b0 (diff)
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Add support for mips16 (16 bit MIPS implementation):
* gencode.c (inst_type): Add mips16 instruction encoding types. (GETDATASIZEINSN): Define. (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and mtlo. (MIPS16_DECODE): New table, for mips16 instructions. (bitmap_val): New static function. (struct mips16_op): Define. (mips16_op_table): New table, for mips16 operands. (build_mips16_operands): New static function. (process_instructions): If PC is odd, decode a mips16 instruction. Break out instruction handling into new build_instruction function. (build_instruction): New static function, broken out of process_instructions. Check modifiers rather than flags for SHIFT bit count and m[ft]{hi,lo} direction. (usage): Pass program name to fprintf. (main): Remove unused variable this_option_optind. Change ``*loptarg++'' to ``loptarg++''. (my_strtoul): Parenthesize && within ||. * interp.c (sim_trace): If tracefh is NULL, set it to stderr. (LoadMemory): Accept a halfword pAddr if vAddr is odd. (simulate): If PC is odd, fetch a 16 bit instruction, and increment PC by 2 rather than 4. * configure.in: Add case for mips16*-*-*. * configure: Rebuild.
Diffstat (limited to 'mmalloc')
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