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authorFredrik Hederstierna <fredrik.hederstierna@verisure.com>2020-09-14 14:56:34 +0100
committerAlan Hayward <alan.hayward@arm.com>2020-09-14 15:26:12 +0100
commit55ea94da360700cd3d96cacb7957904692913c45 (patch)
treecb7a2cc77f72bb3e19e58225e2d2c228654f9a4e /missing
parent74fea55bb7bc24902bbc45f0510a0b68e9bceee4 (diff)
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Fix exception stack unwinding for ARM Cortex-M
For Cortex-M targets using floating-point, eg the Cortex-M4F, its not possible to get any call-stack backtrace if setting a breakpoint in ISR. The exception stack unwinder for Cortex-M does not consider if floating-point registers was stacked or not, further the Cortex-M has two stack pointers: MSP (Main Stack Pointer) and PSP (Process Stack Pointer). This is not handled when GDB tries to backtrace in the exception stack unwinder. This patch fixes this, and gives a correct call-stack backtrace from breakpoints set in a handler or ISR. gdb/ChangeLog: * arm-tdep.c (arm_m_exception_cache): Try use correct stack pointer and stack frame offset when unwinding.
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