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author | Jie Zhang <jie.zhang@analog.com> | 2009-09-03 16:17:36 +0000 |
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committer | Jie Zhang <jie.zhang@analog.com> | 2009-09-03 16:17:36 +0000 |
commit | c958a8a8fb341605fa49cb30d62e98f1b833f542 (patch) | |
tree | 4842b85e37b23a13c68aa40ccaf409f9e10cdd18 /makefile.vms | |
parent | 1d3ad4d0b0eafa4c7182f41077b6bfa1d8bc53c8 (diff) | |
download | gdb-c958a8a8fb341605fa49cb30d62e98f1b833f542.zip gdb-c958a8a8fb341605fa49cb30d62e98f1b833f542.tar.gz gdb-c958a8a8fb341605fa49cb30d62e98f1b833f542.tar.bz2 |
gas/
* config/bfin-defs.h (IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
* config/bfin-parse.y (asm_1): Check illegal register move
instructions.
gas/testsuite/
* gas/bfin/expected_move_errors.s,
gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".
opcodes/
* bfin-dis.c (IS_DREG): Define.
(IS_PREG): Define.
(IS_AREG): Define.
(IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
(decode_REGMV_0): Check illegal register move instructions.
Diffstat (limited to 'makefile.vms')
0 files changed, 0 insertions, 0 deletions