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authorXiao Zeng <zengxiao@eswincomputing.com>2022-11-21 20:00:37 +0800
committerNelson Chu <nelson@rivosinc.com>2022-11-23 10:46:16 +0800
commit06f0a892a5260d8fe93550ed96364cc76fef971d (patch)
treedf114a3e3a6eb9fbb17363cad0ee1cfd9d3114cb /ltversion.m4
parentba64682044d3828909fd5356f0282abaaefa6425 (diff)
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RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard
According to the riscv psabi, R_RISCV_SUB6 only allows 6 least significant bits are valid, but since binutils implementation, we usually get 8 bits field for it. That means, the high 2 bits could be other field and have different purpose. Therefore, we should filter the 8 bits to 6 bits before calculate, and then only encode the valid 6 bits back. By the way, we also need the out-of-range check for R_RISCV_SUB6, and the overflow checks for all R_RISCV_ADD/SUB/SET relocations, but we can add them in the future patches. Passing riscv-gnu-toolchain regressions. bfd/ChangeLog: * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 lower 6 bits as the significant bit. * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
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