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author | Luis Machado <luis.machado@linaro.org> | 2021-12-15 10:24:35 -0300 |
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committer | Luis Machado <luis.machado@linaro.org> | 2021-12-20 10:54:49 -0300 |
commit | 3904c2a5518b6616a4b4b53e3525fa54a6838f16 (patch) | |
tree | 22ee74e194ba47447a1ced19b896f65fa089b0c2 /ltversion.m4 | |
parent | 3f6d78d98442668ff8685864a7599d905412203f (diff) | |
download | gdb-3904c2a5518b6616a4b4b53e3525fa54a6838f16.zip gdb-3904c2a5518b6616a4b4b53e3525fa54a6838f16.tar.gz gdb-3904c2a5518b6616a4b4b53e3525fa54a6838f16.tar.bz2 |
Workaround GDBserver register cache management
Given X and C registers have an overlap, if we write to an X register, we need
to fetch the C registers again so we get updated values (side effects). The
same happens when we attempt to write to the lower half of C registers, we need
to fetch the X registers again so we get updated values.
This patch forces the register cache to get updated values after a register
store request.
Diffstat (limited to 'ltversion.m4')
0 files changed, 0 insertions, 0 deletions