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authorAndrew Waterman <andrew@sifive.com>2017-10-19 11:21:44 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-10-24 09:47:36 -0700
commit63a25ea0de6d2f6d45b26af8d9c808aa35962256 (patch)
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parent09a7c6aa7a07f874f5357cde62b5753a10a5e107 (diff)
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RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0
These are all invalid instructions, so they should not disassemble. opcodes/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * riscv-opc.c (match_c_addi16sp) : New function. (match_c_addi4spn): New function. (match_c_lui): Don't allow 0-immediate encodings. (riscv_opcodes) <addi>: Use the above functions. <add>: Likewise. <c.addi4spn>: Likewise. <c.addi16sp>: Likewise. gas/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * testsuite/gas/riscv/c-addi16sp-fail.d: New test. testsuite/gas/riscv/c-addi16sp-fail.l: Likewise. testsuite/gas/riscv/c-addi16sp-fail.s: Likewise. testsuite/gas/riscv/c-addi4spn-fail.d: Likewise. testsuite/gas/riscv/c-addi4spn-fail.l: Likewise. testsuite/gas/riscv/c-addi4spn-fail.s: Likewise. testsuite/gas/riscv/riscv.exp: Add new tests.
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