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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:01:56 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:01:56 +0000 |
| commit | 42f23f6218262ae8488caab214b7f272c6758941 (patch) | |
| tree | 60a1def1cbdc22e0858d3fab9f1952c83376f0dd /libiberty/strrchr.c | |
| parent | 80776b29d60ebdcd3631604858f144a72b8bcb8e (diff) | |
| download | gdb-42f23f6218262ae8488caab214b7f272c6758941.zip gdb-42f23f6218262ae8488caab214b7f272c6758941.tar.gz gdb-42f23f6218262ae8488caab214b7f272c6758941.tar.bz2 | |
[AArch64][PATCH 6/14] Support FP16 Vector Indexed Element instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Vector Indexed Element, making them available
when +simd+fp16 is enabled.
The instructions added are: FMLA, FMLS, FMUL and FMULX.
The general form for these instructions is
<OP> <V>.<T>, <V>.<T>, <V>.h[<idx>]
where T is 4h or 8h
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for vector indexed element
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_ELEMENT_FP_H): New.
(aarch64_opcode_table): Add fp16 versions of fmla, fmls, fmul and
fmulx to the vector indexed element group.
Change-Id: Ib70cd4eaa6ea2938f84ac41f31d72644dbb0ceb4
Diffstat (limited to 'libiberty/strrchr.c')
0 files changed, 0 insertions, 0 deletions