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authorAlan Modra <amodra@gmail.com>2021-04-06 19:03:35 +0930
committerAlan Modra <amodra@gmail.com>2021-04-09 16:56:43 +0930
commitc3f72de4f53bc3e5f13762633d78d8a7efb8dd79 (patch)
treed1be8ec3633ed86a3451c392d0202444f9a72f6e /ld
parent39178037a1cd78fed67b82aeec0313817c079c2a (diff)
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PowerPC disassembly of pcrel references
This adds some annotation to Power10 pcrel instructions, displaying the target address (ie. pc + D34 field) plus a symbol if there is one at exactly that target address. pld from the .got or .plt will also look up the entry and display it, symbolically if there is a dynamic relocation on the entry. include/ * dis-asm.h (struct disassemble_info): Add dynrelbuf and dynrelcount. binutils/ * objdump.c (struct objdump_disasm_info): Delete dynrelbuf and dynrelcount. (find_symbol_for_address): Adjust for dynrelbuf and dynrelcount move. (disassemble_section, disassemble_data): Likewise. opcodes/ * ppc-dis.c (struct dis_private): Add "special". (POWERPC_DIALECT): Delete. Replace uses with.. (private_data): ..this. New inline function. (disassemble_init_powerpc): Init "special" names. (skip_optional_operands): Add is_pcrel arg, set when detecting R field of prefix instructions. (bsearch_reloc, print_got_plt): New functions. (print_insn_powerpc): For pcrel instructions, print target address and symbol if known, and decode plt and got loads too. gas/ * testsuite/gas/ppc/prefix-pcrel.d: Update expected output. * testsuite/gas/ppc/prefix-reloc.d: Likewise. * gas/testsuite/gas/ppc/vsx_32byte.d: Likewise. ld/ * testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output. * testsuite/ld-powerpc/inlinepcrel-2.d: Likewise. * testsuite/ld-powerpc/notoc2.d: Likewise. * testsuite/ld-powerpc/notoc3.d: Likewise. * testsuite/ld-powerpc/pcrelopt.d: Likewise. * testsuite/ld-powerpc/startstop.d: Likewise. * testsuite/ld-powerpc/tlsget.d: Likewise. * testsuite/ld-powerpc/tlsget2.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/weak1.d: Likewise. * testsuite/ld-powerpc/weak1so.d: Likewise.
Diffstat (limited to 'ld')
-rw-r--r--ld/ChangeLog14
-rw-r--r--ld/testsuite/ld-powerpc/inlinepcrel-1.d2
-rw-r--r--ld/testsuite/ld-powerpc/inlinepcrel-2.d2
-rw-r--r--ld/testsuite/ld-powerpc/notoc2.d12
-rw-r--r--ld/testsuite/ld-powerpc/notoc3.d6
-rw-r--r--ld/testsuite/ld-powerpc/pcrelopt.d64
-rw-r--r--ld/testsuite/ld-powerpc/startstop.d4
-rw-r--r--ld/testsuite/ld-powerpc/tlsget.d2
-rw-r--r--ld/testsuite/ld-powerpc/tlsget2.d2
-rw-r--r--ld/testsuite/ld-powerpc/tlsld.d2
-rw-r--r--ld/testsuite/ld-powerpc/weak1.d8
-rw-r--r--ld/testsuite/ld-powerpc/weak1so.d8
12 files changed, 70 insertions, 56 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 71aa06a..c07105d 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,17 @@
+2021-04-09 Alan Modra <amodra@gmail.com>
+
+ * testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output.
+ * testsuite/ld-powerpc/inlinepcrel-2.d: Likewise.
+ * testsuite/ld-powerpc/notoc2.d: Likewise.
+ * testsuite/ld-powerpc/notoc3.d: Likewise.
+ * testsuite/ld-powerpc/pcrelopt.d: Likewise.
+ * testsuite/ld-powerpc/startstop.d: Likewise.
+ * testsuite/ld-powerpc/tlsget.d: Likewise.
+ * testsuite/ld-powerpc/tlsget2.d: Likewise.
+ * testsuite/ld-powerpc/tlsld.d: Likewise.
+ * testsuite/ld-powerpc/weak1.d: Likewise.
+ * testsuite/ld-powerpc/weak1so.d: Likewise.
+
2021-04-06 Jan Beulich <jbeulich@suse.com>
* pe-dll.c (generate_reloc): Bail immediately when .reloc is
diff --git a/ld/testsuite/ld-powerpc/inlinepcrel-1.d b/ld/testsuite/ld-powerpc/inlinepcrel-1.d
index 7dcb3ad..109a4c7 100644
--- a/ld/testsuite/ld-powerpc/inlinepcrel-1.d
+++ b/ld/testsuite/ld-powerpc/inlinepcrel-1.d
@@ -8,7 +8,7 @@
Disassembly of section \.text:
.*:
-.*: (04 10 00 01|01 00 10 04) pld r12,65944
+.*: (04 10 00 01|01 00 10 04) pld r12,65944 # 10318 \[my_func@plt\]
.*: (e5 80 01 98|98 01 80 e5)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 21|21 04 80 4e) bctrl
diff --git a/ld/testsuite/ld-powerpc/inlinepcrel-2.d b/ld/testsuite/ld-powerpc/inlinepcrel-2.d
index 5e901dc..80fe708 100644
--- a/ld/testsuite/ld-powerpc/inlinepcrel-2.d
+++ b/ld/testsuite/ld-powerpc/inlinepcrel-2.d
@@ -9,7 +9,7 @@
Disassembly of section \.text:
.*:
-.*: (04 10 00 01|01 00 10 04) pld r12,66072
+.*: (04 10 00 01|01 00 10 04) pld r12,66072 # 10010418 \[my_func@plt\]
.*: (e5 80 02 18|18 02 80 e5)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 21|21 04 80 4e) bctrl
diff --git a/ld/testsuite/ld-powerpc/notoc2.d b/ld/testsuite/ld-powerpc/notoc2.d
index 3448f8b..1edaf22 100644
--- a/ld/testsuite/ld-powerpc/notoc2.d
+++ b/ld/testsuite/ld-powerpc/notoc2.d
@@ -9,20 +9,20 @@
Disassembly of section \.text:
.* <.*\.plt_call\.puts>:
-.*: (04 10 00 01|01 00 10 04) pld r12,66200
+.*: (04 10 00 01|01 00 10 04) pld r12,66200 # 10418 \[puts@plt\]
.*: (e5 80 02 98|98 02 80 e5)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 20|20 04 80 4e) bctr
#...
-.*: (04 13 ff ff|ff ff 13 04) pld r12,-1
+.*: (04 13 ff ff|ff ff 13 04) pld r12,-1 # 1bf
.*: (e5 80 ff ff|ff ff 80 e5)
-.*: (04 10 00 00|00 00 10 04) pld r12,0
+.*: (04 10 00 00|00 00 10 04) pld r12,0 # 1c8
.*: (e5 80 00 00|00 00 80 e5)
-.*: (06 13 ff ff|ff ff 13 06) pla r12,-1
+.*: (06 13 ff ff|ff ff 13 06) pla r12,-1 # 1cf
.*: (39 80 ff ff|ff ff 80 39)
-.*: (06 10 00 00|00 00 10 06) pla r12,0
+.*: (06 10 00 00|00 00 10 06) pla r12,0 # 1d8
.*: (39 80 00 00|00 00 80 39)
-.*: (06 10 00 00|00 00 10 06) pla r3,88
+.*: (06 10 00 00|00 00 10 06) pla r3,88 # 238 <hello>
.*: (38 60 00 58|58 00 60 38)
.*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts>
.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/notoc3.d b/ld/testsuite/ld-powerpc/notoc3.d
index ce19e99..134bba3 100644
--- a/ld/testsuite/ld-powerpc/notoc3.d
+++ b/ld/testsuite/ld-powerpc/notoc3.d
@@ -18,7 +18,7 @@ Disassembly of section \.text:
.* <.*\.plt_branch\.ext>:
.*: (00 20 60 3d|3d 60 20 00) lis r11,8192
.*: (00 00 6b 61|61 6b 00 00) ori r11,r11,0
-.*: (ff ef 13 06|06 13 ef ff) pla r12,-268435736
+.*: (ff ef 13 06|06 13 ef ff) pla r12,-268435736 # 0
.*: (e8 fe 80 39|39 80 fe e8)
.*: (46 17 6b 79|79 6b 17 46) rldicr r11,r11,34,29
.*: (14 62 8b 7d|7d 8b 62 14) add r12,r11,r12
@@ -30,13 +30,13 @@ Disassembly of section \.text:
.* <.*\.long_branch\.f2>:
.*: (00 00 00 60|60 00 00 00) nop
-.*: (00 00 10 06|06 10 00 00) pla r12,108
+.*: (00 00 10 06|06 10 00 00) pla r12,108 # .* <f2>
.*: (6c 00 80 39|39 80 00 6c)
.*: (.. .. 00 48|48 00 .. ..) b .* <f2>
.* <.*\.long_branch\.g2>:
.*: (00 00 00 60|60 00 00 00) nop
-.*: (00 00 10 06|06 10 00 00) pla r12,144
+.*: (00 00 10 06|06 10 00 00) pla r12,144 # .* <g2>
.*: (90 00 80 39|39 80 00 90)
.*: (.. .. 00 48|48 00 .. ..) b .* <g2>
#...
diff --git a/ld/testsuite/ld-powerpc/pcrelopt.d b/ld/testsuite/ld-powerpc/pcrelopt.d
index 00c8167..3d23037 100644
--- a/ld/testsuite/ld-powerpc/pcrelopt.d
+++ b/ld/testsuite/ld-powerpc/pcrelopt.d
@@ -4,105 +4,105 @@
Disassembly of section \.text:
0+10000200 <_start>:
-.*: (06 10 00 01|01 00 10 06) plbz r3,66320
+.*: (06 10 00 01|01 00 10 06) plbz r3,66320 # .* <sym>
.*: (88 60 03 10|10 03 60 88)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) plhz r4,66308
+.*: (06 10 00 01|01 00 10 06) plhz r4,66308 # .* <sym>
.*: (a0 80 03 04|04 03 80 a0)
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) plha r3,66288
+.*: (06 10 00 01|01 00 10 06) plha r3,66288 # .* <sym>
.*: (a8 60 02 f0|f0 02 60 a8)
.*: (40 82 ff f4|f4 ff 82 40) bne .*
-.*: (06 10 00 01|01 00 10 06) plwz r3,66276
+.*: (06 10 00 01|01 00 10 06) plwz r3,66276 # .* <sym>
.*: (80 60 02 e4|e4 02 60 80)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plwa r3,66264
+.*: (04 10 00 01|01 00 10 04) plwa r3,66264 # .* <sym>
.*: (a4 60 02 d8|d8 02 60 a4)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pld r3,66252
+.*: (04 10 00 01|01 00 10 04) pld r3,66252 # .* <sym>
.*: (e4 60 02 cc|cc 02 60 e4)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plq r14,66240
+.*: (04 10 00 01|01 00 10 04) plq r14,66240 # .* <sym>
.*: (e1 c0 02 c0|c0 02 c0 e1)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) plfs f1,66228
+.*: (06 10 00 01|01 00 10 06) plfs f1,66228 # .* <sym>
.*: (c0 20 02 b4|b4 02 20 c0)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) plfd f1,66216
+.*: (06 10 00 01|01 00 10 06) plfd f1,66216 # .* <sym>
.*: (c8 20 02 a8|a8 02 20 c8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plxsd v30,66204
+.*: (04 10 00 01|01 00 10 04) plxsd v30,66204 # .* <sym>
.*: (ab c0 02 9c|9c 02 c0 ab)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plxssp v31,66192
+.*: (04 10 00 01|01 00 10 04) plxssp v31,66192 # .* <sym>
.*: (af e0 02 90|90 02 e0 af)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plxv vs63,66180
+.*: (04 10 00 01|01 00 10 04) plxv vs63,66180 # .* <sym>
.*: (cf e0 02 84|84 02 e0 cf)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plxv vs0,66168
+.*: (04 10 00 01|01 00 10 04) plxv vs0,66168 # .* <sym>
.*: (c8 00 02 78|78 02 00 c8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) pstb r3,66156
+.*: (06 10 00 01|01 00 10 06) pstb r3,66156 # .* <sym>
.*: (98 60 02 6c|6c 02 60 98)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) psth r3,66144
+.*: (06 10 00 01|01 00 10 06) psth r3,66144 # .* <sym>
.*: (b0 60 02 60|60 02 60 b0)
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) pstw r3,66128
+.*: (06 10 00 01|01 00 10 06) pstw r3,66128 # .* <sym>
.*: (90 60 02 50|50 02 60 90)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstd r3,66116
+.*: (04 10 00 01|01 00 10 04) pstd r3,66116 # .* <sym>
.*: (f4 60 02 44|44 02 60 f4)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstq r14,66104
+.*: (04 10 00 01|01 00 10 04) pstq r14,66104 # .* <sym>
.*: (f1 c0 02 38|38 02 c0 f1)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) pstfd f1,66092
+.*: (06 10 00 01|01 00 10 06) pstfd f1,66092 # .* <sym>
.*: (d8 20 02 2c|2c 02 20 d8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) pstfs f2,66080
+.*: (06 10 00 01|01 00 10 06) pstfs f2,66080 # .* <sym>
.*: (d0 40 02 20|20 02 40 d0)
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxsd v30,66064
+.*: (04 10 00 01|01 00 10 04) pstxsd v30,66064 # .* <sym>
.*: (bb c0 02 10|10 02 c0 bb)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxssp v31,66052
+.*: (04 10 00 01|01 00 10 04) pstxssp v31,66052 # .* <sym>
.*: (bf e0 02 04|04 02 e0 bf)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxv vs63,66040
+.*: (04 10 00 01|01 00 10 04) pstxv vs63,66040 # .* <sym>
.*: (df e0 01 f8|f8 01 e0 df)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxv vs0,66028
+.*: (04 10 00 01|01 00 10 04) pstxv vs0,66028 # .* <sym>
.*: (d8 00 01 ec|ec 01 00 d8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) plbz r3,70676
+.*: (06 10 00 01|01 00 10 06) plbz r3,70676 # 10011744
.*: (88 60 14 14|14 14 60 88)
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 12 35|35 12 10 04) plq r4,305485896
+.*: (04 10 12 35|35 12 10 04) plq r4,305485896 # 22355b88
.*: (e0 80 58 48|48 58 80 e0)
.*: (07 00 00 00|00 00 00 07) pnop
.*: (00 00 00 00|00 00 00 00)
-.*: (04 10 00 01|01 00 10 04) pld r9,65976
+.*: (04 10 00 01|01 00 10 04) pld r9,65976 # 10010508 \[i@got\]
.*: (e5 20 01 b8|b8 01 20 e5)
.*: (e8 09 00 00|00 00 09 e8) ld r0,0\(r9\)
-.*: (06 10 00 01|01 00 10 06) pla r7,65972
+.*: (06 10 00 01|01 00 10 06) pla r7,65972 # .* <sym>
.*: (38 e0 01 b4|b4 01 e0 38)
.*: (88 c7 00 00|00 00 c7 88) lbz r6,0\(r7\)
-.*: (04 10 00 01|01 00 10 04) plxvp vs62,65960
+.*: (04 10 00 01|01 00 10 04) plxvp vs62,65960 # .* <sym>
.*: (eb e0 01 a8|a8 01 e0 eb)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) plxvp vs0,65948
+.*: (04 10 00 01|01 00 10 04) plxvp vs0,65948 # .* <sym>
.*: (e8 00 01 9c|9c 01 00 e8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxvp vs62,65936
+.*: (04 10 00 01|01 00 10 04) pstxvp vs62,65936 # .* <sym>
.*: (fb e0 01 90|90 01 e0 fb)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pstxvp vs0,65924
+.*: (04 10 00 01|01 00 10 04) pstxvp vs0,65924 # .* <sym>
.*: (f8 00 01 84|84 01 00 f8)
.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/startstop.d b/ld/testsuite/ld-powerpc/startstop.d
index 2bf4c73..0927248 100644
--- a/ld/testsuite/ld-powerpc/startstop.d
+++ b/ld/testsuite/ld-powerpc/startstop.d
@@ -4,7 +4,7 @@
Disassembly of section \.text:
0+140 <_start>:
- 140: (04 10 00 01|01 00 10 04) pld r3,66000
+ 140: (04 10 00 01|01 00 10 04) pld r3,66000 # 10310 \[0@got\]
144: (e4 60 01 d0|d0 01 60 e4)
- 148: (04 10 00 01|01 00 10 04) pld r4,65984
+ 148: (04 10 00 01|01 00 10 04) pld r4,65984 # 10308 \[0@got\]
14c: (e4 80 01 c0|c0 01 80 e4)
diff --git a/ld/testsuite/ld-powerpc/tlsget.d b/ld/testsuite/ld-powerpc/tlsget.d
index 1c61fce..31ee848 100644
--- a/ld/testsuite/ld-powerpc/tlsget.d
+++ b/ld/testsuite/ld-powerpc/tlsget.d
@@ -64,7 +64,7 @@ Disassembly of section \.text:
.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
.* <fun>:
-.*: (06 10 00 00|00 00 10 06) pla r3,8
+.*: (06 10 00 00|00 00 10 06) pla r3,8.*
.*: (38 60 00 08|08 00 60 38)
.*: (4e 80 00 20|20 00 80 4e) blr
.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/tlsget2.d b/ld/testsuite/ld-powerpc/tlsget2.d
index 48569c8..0379807 100644
--- a/ld/testsuite/ld-powerpc/tlsget2.d
+++ b/ld/testsuite/ld-powerpc/tlsget2.d
@@ -50,7 +50,7 @@ Disassembly of section \.text:
.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
.* <fun>:
-.*: (06 10 00 00|00 00 10 06) pla r3,8
+.*: (06 10 00 00|00 00 10 06) pla r3,8.*
.*: (38 60 00 08|08 00 60 38)
.*: (4e 80 00 20|20 00 80 4e) blr
.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/tlsld.d b/ld/testsuite/ld-powerpc/tlsld.d
index 862370f..b62328c 100644
--- a/ld/testsuite/ld-powerpc/tlsld.d
+++ b/ld/testsuite/ld-powerpc/tlsld.d
@@ -20,7 +20,7 @@ Disassembly of section \.text:
.*: (60 00 00 00|00 00 00 60) nop
.*: (06 03 ff ff|ff ff 03 06) paddi r9,r3,-32728
.*: (39 23 80 28|28 80 23 39)
-.*: (04 10 00 01|01 00 10 04) pld r10,65784
+.*: (04 10 00 01|01 00 10 04) pld r10,65784 # 10010228 \[f+8030@got\]
.*: (e5 40 00 f8|f8 00 40 e5)
.*: (7d 4a 1a 14|14 1a 4a 7d) add r10,r10,r3
.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/weak1.d b/ld/testsuite/ld-powerpc/weak1.d
index c012753..dcb24f4 100644
--- a/ld/testsuite/ld-powerpc/weak1.d
+++ b/ld/testsuite/ld-powerpc/weak1.d
@@ -4,13 +4,13 @@
Disassembly of section \.text:
.*0c0 <_start>:
-.*0c0: (04 10 00 01|01 00 10 04) pld r3,65888
+.*0c0: (04 10 00 01|01 00 10 04) pld r3,65888 # 10010220 \[0@got\]
.*0c4: (e4 60 01 60|60 01 60 e4)
-.*0c8: (04 10 00 01|01 00 10 04) pld r3,65856
+.*0c8: (04 10 00 01|01 00 10 04) pld r3,65856 # 10010208 \[0@got\]
.*0cc: (e4 60 01 40|40 01 60 e4)
-.*0d0: (04 10 00 01|01 00 10 04) pld r3,65864
+.*0d0: (04 10 00 01|01 00 10 04) pld r3,65864 # 10010218 \[0@got\]
.*0d4: (e4 60 01 48|48 01 60 e4)
-.*0d8: (04 10 00 01|01 00 10 04) pld r3,65848
+.*0d8: (04 10 00 01|01 00 10 04) pld r3,65848 # 10010210 \[0@got\]
.*0dc: (e4 60 01 38|38 01 60 e4)
.*0e0: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
.*0e4: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
diff --git a/ld/testsuite/ld-powerpc/weak1so.d b/ld/testsuite/ld-powerpc/weak1so.d
index 0d34b3b..30bbdf9 100644
--- a/ld/testsuite/ld-powerpc/weak1so.d
+++ b/ld/testsuite/ld-powerpc/weak1so.d
@@ -4,13 +4,13 @@
Disassembly of section \.text:
0+1c0 <_start>:
- 1c0: (04 10 00 01|01 00 10 04) pld r3,66144
+ 1c0: (04 10 00 01|01 00 10 04) pld r3,66144 # 10420 \[x1@got\]
1c4: (e4 60 02 60|60 02 60 e4)
- 1c8: (04 10 00 01|01 00 10 04) pld r3,66112
+ 1c8: (04 10 00 01|01 00 10 04) pld r3,66112 # 10408 \[0@got\]
1cc: (e4 60 02 40|40 02 60 e4)
- 1d0: (04 10 00 01|01 00 10 04) pld r3,66120
+ 1d0: (04 10 00 01|01 00 10 04) pld r3,66120 # 10418 \[0@got\]
1d4: (e4 60 02 48|48 02 60 e4)
- 1d8: (04 10 00 01|01 00 10 04) pld r3,66104
+ 1d8: (04 10 00 01|01 00 10 04) pld r3,66104 # 10410 \[0@got\]
1dc: (e4 60 02 38|38 02 60 e4)
1e0: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
1e4: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)