[ARM] Update bfd's Tag_CPU_arch knowledge

BFD's bfd_get_mach () function returns a bfd specific value representing
the architecture of the target which is populated from the Tag_CPU_arch
build attribute value of that target. Among other users of that
interfacem, objdump which uses it to print the architecture version of
the binary being examinated and to decide what instruction is available
if run with "-m arm" via its own mapping from bfd_mach_arm_X values to
feature bits available.

However, both BFD and objdump's most recent known architecture is
Armv5TE. When encountering a newer architecture bfd_get_mach will return
bfd_mach_arm_unknown. This is unfortunate since objdump uses that value
to allow all instructions on all architectures which is already what it
does by default, making the "-m arm" trick useless.

This patch updates BFD and objdump's knowledge of Arm architecture
versions up to the latest Armv8-M Baseline and Mainline, Armv8-R and
Armv8.4-A architectures. Since several architecture versions (eg. 8.X-A)
share the same Tag_CPU_arch build attribute value and
bfd_mach_arm values, the mapping from bfd machine value to feature bits
need to return the most featureful feature bits that would yield the
given bfd machine value otherwise some instruction would not disassemble
under "-m arm" mode. The patch rework that mapping to make this clearer
and simplify writing the mapping rules. In particular, for simplicity
all FPU instructions are allowed in all cases.

Finally, the patch also rewrite the cpu_arch_ver table in GAS to use the
TAG_CPU_ARCH_X macros rather than hardcode their value.

2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ,
	bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M,
	bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R,
	bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define.
	* bfd-in2.h: Regenerate.
	* cpu-arm.c (arch_info_struct): Add entries for above new
	bfd_mach_arm values.
	* elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to
	bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later
	architectures.  Force assert failure for any new Tag_CPU_arch value.

gas/
	* config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros
	rather than hardcode their values.

ld/
	* arm-dis.c (select_arm_features): Fix typo in heading comment.  Allow
	all FPU features and add mapping from new bfd_mach_arm values to
	allowed CPU feature bits.

opcodes/
	* testsuite/ld-arm/tls-descrelax-be8.d: Add architecture version in
	expected result.
	* testsuite/ld-arm/tls-descrelax-v7.d: Likewise.
	* testsuite/ld-arm/tls-longplt-lib.d: Likewise.
	* testsuite/ld-arm/tls-longplt.d: Likewise.

5 files changed, 10 insertions, 4 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 399ea0a..31959a7 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,5 +1,11 @@
 2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
+	* arm-dis.c (select_arm_features): Fix typo in heading comment.  Allow
+	all FPU features and add mapping from new bfd_mach_arm values to
+	allowed CPU feature bits.
+
+2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
 	* NEWS: Use command-line consistently when used in a compount word.
 	* ld.texinfo: Likewise.
 	* ldint.texinfo: Likewise.
diff --git a/ld/testsuite/ld-arm/tls-descrelax-be8.d b/ld/testsuite/ld-arm/tls-descrelax-be8.d
index 1b2159c..90a9633 100644
--- a/ld/testsuite/ld-arm/tls-descrelax-be8.d
+++ b/ld/testsuite/ld-arm/tls-descrelax-be8.d
@@ -1,5 +1,5 @@
 .*:     file format elf32-.*
-architecture: arm, flags 0x[0-9a-f]+:
+architecture: armv7, flags 0x[0-9a-f]+:
 EXEC_P, HAS_SYMS, D_PAGED
 start address 0x[0-9a-f]+
 
diff --git a/ld/testsuite/ld-arm/tls-descrelax-v7.d b/ld/testsuite/ld-arm/tls-descrelax-v7.d
index 1b2159c..90a9633 100644
--- a/ld/testsuite/ld-arm/tls-descrelax-v7.d
+++ b/ld/testsuite/ld-arm/tls-descrelax-v7.d
@@ -1,5 +1,5 @@
 .*:     file format elf32-.*
-architecture: arm, flags 0x[0-9a-f]+:
+architecture: armv7, flags 0x[0-9a-f]+:
 EXEC_P, HAS_SYMS, D_PAGED
 start address 0x[0-9a-f]+
 
diff --git a/ld/testsuite/ld-arm/tls-longplt-lib.d b/ld/testsuite/ld-arm/tls-longplt-lib.d
index 29b52fe..ad34c55 100644
--- a/ld/testsuite/ld-arm/tls-longplt-lib.d
+++ b/ld/testsuite/ld-arm/tls-longplt-lib.d
@@ -1,5 +1,5 @@
 .*:     file format elf32-.*arm
-architecture: arm, flags 0x00000150:
+architecture: armv6t2, flags 0x00000150:
 HAS_SYMS, DYNAMIC, D_PAGED
 start address 0x.*
 
diff --git a/ld/testsuite/ld-arm/tls-longplt.d b/ld/testsuite/ld-arm/tls-longplt.d
index afa6b06..0664672 100644
--- a/ld/testsuite/ld-arm/tls-longplt.d
+++ b/ld/testsuite/ld-arm/tls-longplt.d
@@ -1,5 +1,5 @@
 .*:     file format elf32-.*arm
-architecture: arm, flags 0x00000112:
+architecture: armv6t2, flags 0x00000112:
 EXEC_P, HAS_SYMS, D_PAGED
 start address 0x.*