bfd/

	* elfxx-mips.h (_bfd_mips_elf_insn32): New prototype.
	* elfxx-mips.c (mips_elf_link_hash_table): Add insn32 member.
	(STUB_MOVE32_MICROMIPS, STUB_JALR32_MICROMIPS): New macros.
	(MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE): Likewise.
	(MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE): Likewise.
	(micromips_insn32_o32_exec_plt0_entry): New variable.
	(micromips_insn32_o32_exec_plt_entry): Likewise.
	(_bfd_mips_elf_adjust_dynamic_symbol): Handle insn32 mode.
	(mips_elf_estimate_stub_size): Likewise.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(mips_finish_exec_plt): Likewise.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips_elf_insn32): New function.
	(_bfd_mips_elf_get_synthetic_symtab): Handle insn32 PLT.

	gas/
	* config/tc-mips.c (mips_set_options): Add insn32 member.
	(mips_opts): Initialize it.
	(NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
	(options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
	(md_longopts): Add "minsn32" and "mno-insn32" options.
	(is_size_valid): Handle insn32 mode.
	(md_assemble): Pass instruction string down to macro.
	(brk_fmt): Add second dimension and insn32 mode initializers.
	(mfhl_fmt): Likewise.
	(BRK_FMT, MFHL_FMT): Handle insn32 mode.
	(macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
	(macro_build_jalr, move_register): Handle insn32 mode.
	(macro_build_branch_rs): Likewise.
	(macro): Handle insn32 mode.
	<M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
	(mips_ip): Handle insn32 mode.
	(md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
	(s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
	(mips_handle_align): Handle insn32 mode.
	(md_show_usage): Add -minsn32 and -mno-insn32.

	* doc/as.texinfo (Target MIPS options): Add -minsn32 and
	-mno-insn32 options.
	(-minsn32, -mno-insn32): New options.
	* doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
	options.
	(MIPS assembly options): New node.  Document .set insn32 and
	.set noinsn32.
	(MIPS-Dependent): List the new node.

	gas/testsuite/
	* gas/mips/micromips-insn32.d: New test.
	* gas/mips/micromips-noinsn32.d: Likewise.
	* gas/mips/micromips.l: Rename to...
	* gas/mips/micromips-warn.l: ... this.
	* gas/mips/micromips.d: Update accordingly.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips.l: New list test.
	* gas/mips/micromips.s: Add conditionals.
	* gas/mips/mips.exp: Run the new tests.

	include/opcode/
	* mips.h: Add M_JRADDIUSP, M_JRC and M_MOVEP anonymous enum
	values.

	ld/
	* emultempl/mipself.em (insn32): New variable.
	(mips_create_output_section_statements): Handle insn32 mode.
	(PARSE_AND_LIST_PROLOGUE): New macro.
	(PARSE_AND_LIST_LONGOPTS): Likewise.
	(PARSE_AND_LIST_OPTIONS): Likewise.

	* gen-doc.texi: Set MIPS.
	* ld.texinfo: Likewise.
	(Options specific to MIPS targets): New section.
	(ld and MIPS family): New node.
	(Top, Machine Dependent): List the new node.

	opcodes/
	* micromips-opc.c (micromips_opcodes): Add "jraddiusp", "jrc"
	and "movep" macros.

4 files changed, 111 insertions, 0 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 24d90ff..1367a94 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,17 @@
+2013-06-25  Maciej W. Rozycki  <macro@codesourcery.com>
+
+	* emultempl/mipself.em (insn32): New variable.
+	(mips_create_output_section_statements): Handle insn32 mode.
+	(PARSE_AND_LIST_PROLOGUE): New macro.
+	(PARSE_AND_LIST_LONGOPTS): Likewise.
+	(PARSE_AND_LIST_OPTIONS): Likewise.
+
+	* gen-doc.texi: Set MIPS.
+	* ld.texinfo: Likewise.
+	(Options specific to MIPS targets): New section.
+	(ld and MIPS family): New node.
+	(Top, Machine Dependent): List the new node.
+
 2013-06-24  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
diff --git a/ld/emultempl/mipself.em b/ld/emultempl/mipself.em
index 9ac61a2..3c6ec9f 100644
--- a/ld/emultempl/mipself.em
+++ b/ld/emultempl/mipself.em
@@ -33,6 +33,8 @@ fragment <<EOF
 static lang_input_statement_type *stub_file;
 static bfd *stub_bfd;
 
+static bfd_boolean insn32;
+
 static void
 mips_after_parse (void)
 {
@@ -199,6 +201,12 @@ mips_add_stub_section (const char *stub_sec_name, asection *input_section,
 static void
 mips_create_output_section_statements (void)
 {
+  struct elf_link_hash_table *htab;
+
+  htab = elf_hash_table (&link_info);
+  if (is_elf_hash_table (htab) && is_mips_elf (link_info.output_bfd))
+    _bfd_mips_elf_insn32 (&link_info, insn32);
+
   if (is_mips_elf (link_info.output_bfd))
     _bfd_mips_elf_init_stubs (&link_info, mips_add_stub_section);
 }
@@ -241,6 +249,38 @@ mips_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
 
 EOF
 
+# Define some shell vars to insert bits of code into the standard elf
+# parse_args and list_options functions.
+#
+PARSE_AND_LIST_PROLOGUE='
+#define OPTION_INSN32			301
+#define OPTION_NO_INSN32		(OPTION_INSN32 + 1)
+'
+
+PARSE_AND_LIST_LONGOPTS='
+  { "insn32", no_argument, NULL, OPTION_INSN32 },
+  { "no-insn32", no_argument, NULL, OPTION_NO_INSN32 },
+'
+
+PARSE_AND_LIST_OPTIONS='
+  fprintf (file, _("\
+  --insn32                    Only generate 32-bit microMIPS instructions\n"
+		   ));
+  fprintf (file, _("\
+  --no-insn32                 Generate all microMIPS instructions\n"
+		   ));
+'
+
+PARSE_AND_LIST_ARGS_CASES='
+    case OPTION_INSN32:
+      insn32 = TRUE;
+      break;
+
+    case OPTION_NO_INSN32:
+      insn32 = FALSE;
+      break;
+'
+
 LDEMUL_AFTER_PARSE=mips_after_parse
 LDEMUL_BEFORE_ALLOCATION=mips_before_allocation
 LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=mips_create_output_section_statements
diff --git a/ld/gen-doc.texi b/ld/gen-doc.texi
index 46fc92f..a2c88db 100644
--- a/ld/gen-doc.texi
+++ b/ld/gen-doc.texi
@@ -14,6 +14,7 @@
 @set I960
 @set M68HC11
 @set M68K
+@set MIPS
 @set MMIX
 @set MSP430
 @set POWERPC
diff --git a/ld/ld.texinfo b/ld/ld.texinfo
index 471cee9..d783ca9 100644
--- a/ld/ld.texinfo
+++ b/ld/ld.texinfo
@@ -26,6 +26,7 @@
 @set I960
 @set M68HC11
 @set M68K
+@set MIPS
 @set MMIX
 @set MSP430
 @set POWERPC
@@ -146,6 +147,9 @@ in the section entitled ``GNU Free Documentation License''.
 @ifset M68K
 * M68K::                        ld and Motorola 68K family
 @end ifset
+@ifset MIPS
+* MIPS::                        ld and MIPS family
+@end ifset
 @ifset POWERPC
 * PowerPC ELF32::               ld and PowerPC 32-bit ELF Support
 @end ifset
@@ -2732,6 +2736,32 @@ Info entry for @file{ld}.
 @c man end
 @end ifset
 
+@ifset MIPS
+@subsection Options specific to MIPS targets
+
+@c man begin OPTIONS
+
+The following options are supported to control microMIPS instruction
+generation when linking for MIPS targets.
+
+@table @gcctabopt
+
+@kindex --insn32
+@item --insn32
+@kindex --no-insn32
+@itemx --no-insn32
+These options control the choice of microMIPS instructions used in code
+generated by the linker, such as that in the PLT or lazy binding stubs,
+or in relaxation.  If @samp{--insn32} is used, then the linker only uses
+32-bit instruction encodings.  By default or if @samp{--no-insn32} is
+used, all instruction encodings are used, including 16-bit ones where
+possible.
+
+@end table
+
+@c man end
+@end ifset
+
 @ifset UsesEnvVars
 @node Environment
 @section Environment Variables
@@ -6033,6 +6063,9 @@ functionality are not listed.
 @ifset M68K
 * M68K::			@command{ld} and the Motorola 68K family
 @end ifset
+@ifset MIPS
+* MIPS::			@command{ld} and the MIPS family
+@end ifset
 @ifset MMIX
 * MMIX::			@command{ld} and MMIX
 @end ifset
@@ -6531,6 +6564,29 @@ files might access different GOTs.  Not all environments support such GOTs.
 @end ifclear
 @end ifset
 
+@ifset MIPS
+@ifclear GENERIC
+@raisesections
+@end ifclear
+
+@node MIPS
+@section @command{ld} and the MIPS family
+
+@cindex MIPS microMIPS instruction choice selection
+@kindex --insn32
+@kindex --no-insn32
+The @samp{--insn32} and @samp{--no-insn32} options control the choice of
+microMIPS instructions used in code generated by the linker, such as that
+in the PLT or lazy binding stubs, or in relaxation.  If @samp{--insn32} is
+used, then the linker only uses 32-bit instruction encodings.  By default
+or if @samp{--no-insn32} is used, all instruction encodings are used,
+including 16-bit ones where possible.
+
+@ifclear GENERIC
+@lowersections
+@end ifclear
+@end ifset
+
 @ifset MMIX
 @ifclear GENERIC
 @raisesections