Fix binary compatibility between GCC and the TI compiler for the PRU target.

My original implementation for LDI32 pseudo does not conform to
the TI ABI.  I wrongly documented my TI PRU ELF object files inspection,
which got propagated into my binutils implementation.

Issue was exposed when running the GCC ABI testsuite against TI toolchain.
According to TI ABI, LDI32 must use first LDI instruction to load
the MSB 16bits, and second LDI instruction for the LSB 16bits.

This patch will break binary compatibility with previously released
binutils versions for PRU. Still, I think it is better to fix
binutils to conform to the chip vendor ABI.

bfd	* elf32-pru.c (pru_elf32_do_ldi32_relocate): Make LDI32 relocation
	conformant to TI ABI.
	(pru_elf32_relax_section): Likewise.
	(pru_elf_relax_delete_bytes): Fix offsets for new LDI32 code.
	* elf32-pru.c (pru_elf32_do_ldi32_relocate): Ignore addend.
	(pru_elf32_pmem_relocate): Trap - should not get here.
	(pru_elf32_relocate_section): Add support for REL relocations.
	(elf_info_to_howto_rel): Enable REL.
	(elf_backend_may_use_rel_p): Likewise.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.

gas	* config/tc-pru.c (md_apply_fix): Make LDI32 relocation conformant
	to TI ABI.
	(pru_assemble_arg_i): Likewise.
	(output_insn_ldi32): Likewise.
	* testsuite/gas/pru/ldi.d: Update test for the now fixed LDI32.
	* gas/config/tc-pru.c (pru_assemble_arg_b): Check imm8 operand range.
	* gas/testsuite/gas/pru/illegal2.l: New test.
	* gas/testsuite/gas/pru/illegal2.s: New test.
	* gas/testsuite/gas/pru/pru.exp: Register new illegal2 test.

ld	* scripttempl/pru.sc: Add LD sections to allow linking TI
	toolchain object files.
	* scripttempl/pru.sc: Switch to init_array.
	* testsuite/ld-pru/ldi32.d: Update LDI32 test to conform to TI ABI.
	* testsuite/ld-pru/norelax_ldi32-data.d: Likewise.
	* testsuite/ld-pru/norelax_ldi32-dis.d: Likewise.
	* testsuite/ld-pru/relax_ldi32-data.d: Likewise.
	* testsuite/ld-pru/relax_ldi32-dis.d: Likewise.

7 files changed, 73 insertions, 51 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index e8e1be0..0cbb953 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,14 @@
+2018-05-09  2018-05-02  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* scripttempl/pru.sc: Add LD sections to allow linking TI
+	toolchain object files.
+	* scripttempl/pru.sc: Switch to init_array.
+	* testsuite/ld-pru/ldi32.d: Update LDI32 test to conform to TI ABI.
+	* testsuite/ld-pru/norelax_ldi32-data.d: Likewise.
+	* testsuite/ld-pru/norelax_ldi32-dis.d: Likewise.
+	* testsuite/ld-pru/relax_ldi32-data.d: Likewise.
+	* testsuite/ld-pru/relax_ldi32-dis.d: Likewise.
+
 2018-05-09  Alan Modra  <amodra@gmail.com>
 
 	* po/BLD-POTFILES.in: Regenerate.
diff --git a/ld/scripttempl/pru.sc b/ld/scripttempl/pru.sc
index 88fe06c..f64e0b7 100644
--- a/ld/scripttempl/pru.sc
+++ b/ld/scripttempl/pru.sc
@@ -32,12 +32,14 @@ SECTIONS
     {
       *(.rel.text)
       ${RELOCATING+*(.rel.text.*)}
+      ${RELOCATING+*(.rel.text:*)}
       ${RELOCATING+*(.rel.gnu.linkonce.t*)}
     }
   .rela.text   ${RELOCATING-0} :
     {
       *(.rela.text)
       ${RELOCATING+*(.rela.text.*)}
+      ${RELOCATING+*(.rela.text:*)}
       ${RELOCATING+*(.rela.gnu.linkonce.t*)}
     }
   .rel.fini    ${RELOCATING-0} : { *(.rel.fini)		}
@@ -46,36 +48,40 @@ SECTIONS
     {
       *(.rel.rodata)
       ${RELOCATING+*(.rel.rodata.*)}
+      ${RELOCATING+*(.rel.rodata:*)}
       ${RELOCATING+*(.rel.gnu.linkonce.r*)}
     }
   .rela.rodata ${RELOCATING-0} :
     {
       *(.rela.rodata)
       ${RELOCATING+*(.rela.rodata.*)}
+      ${RELOCATING+*(.rela.rodata:*)}
       ${RELOCATING+*(.rela.gnu.linkonce.r*)}
     }
   .rel.data    ${RELOCATING-0} :
     {
       *(.rel.data)
       ${RELOCATING+*(.rel.data.*)}
+      ${RELOCATING+*(.rel.data:*)}
       ${RELOCATING+*(.rel.gnu.linkonce.d*)}
     }
   .rela.data   ${RELOCATING-0} :
     {
       *(.rela.data)
       ${RELOCATING+*(.rela.data.*)}
+      ${RELOCATING+*(.rela.data:*)}
       ${RELOCATING+*(.rela.gnu.linkonce.d*)}
     }
-  .rel.ctors   ${RELOCATING-0} : { *(.rel.ctors)	}
-  .rela.ctors  ${RELOCATING-0} : { *(.rela.ctors)	}
-  .rel.dtors   ${RELOCATING-0} : { *(.rel.dtors)	}
-  .rela.dtors  ${RELOCATING-0} : { *(.rela.dtors)	}
-  .rel.got     ${RELOCATING-0} : { *(.rel.got)		}
-  .rela.got    ${RELOCATING-0} : { *(.rela.got)		}
-  .rel.bss     ${RELOCATING-0} : { *(.rel.bss)		}
-  .rela.bss    ${RELOCATING-0} : { *(.rela.bss)		}
-  .rel.plt     ${RELOCATING-0} : { *(.rel.plt)		}
-  .rela.plt    ${RELOCATING-0} : { *(.rela.plt)		}
+  .rel.init_array   	${RELOCATING-0} : { *(.rel.init_array)	}
+  .rela.init_array  	${RELOCATING-0} : { *(.rela.init_array)	}
+  .rel.fini_array   	${RELOCATING-0} : { *(.rel.fini_array)	}
+  .rela.fini_array  	${RELOCATING-0} : { *(.rela.fini_array)	}
+  .rel.got     		${RELOCATING-0} : { *(.rel.got)		}
+  .rela.got    		${RELOCATING-0} : { *(.rela.got)	}
+  .rel.bss     		${RELOCATING-0} : { *(.rel.bss)		}
+  .rela.bss    		${RELOCATING-0} : { *(.rela.bss)	}
+  .rel.plt     		${RELOCATING-0} : { *(.rel.plt)		}
+  .rela.plt    		${RELOCATING-0} : { *(.rela.plt)	}
 
   /* Internal text space.  */
   .text ${RELOCATING-0} :
@@ -92,6 +98,8 @@ SECTIONS
     ${RELOCATING+. = ALIGN(4);}
     ${RELOCATING+*(.text.*)}
     ${RELOCATING+. = ALIGN(4);}
+    ${RELOCATING+*(.text:*)}
+    ${RELOCATING+. = ALIGN(4);}
     ${RELOCATING+*(.gnu.linkonce.t*)}
     ${RELOCATING+. = ALIGN(4);}
 
@@ -105,14 +113,14 @@ SECTIONS
 
     /* CRT is prepared for constructor/destructor table to have
        a "valid" NULL address.  */
-    ${CONSTRUCTING+ _ctors_start = . ; }
-    ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.ctors.*)))}
-    ${CONSTRUCTING+ KEEP (*(.ctors))}
-    ${CONSTRUCTING+ _ctors_end = . ; }
-    ${CONSTRUCTING+ _dtors_start = . ; }
-    ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.dtors.*)))}
-    ${CONSTRUCTING+ KEEP (*(.dtors))}
-    ${CONSTRUCTING+ _dtors_end = . ; }
+    ${CONSTRUCTING+ __init_array_begin = . ; }
+    ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*)))}
+    ${CONSTRUCTING+ KEEP (*(.init_array))}
+    ${CONSTRUCTING+ __init_array_end = . ; }
+    ${CONSTRUCTING+ __fini_array_begin = . ; }
+    ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*)))}
+    ${CONSTRUCTING+ KEEP (*(.fini_array))}
+    ${CONSTRUCTING+ __fini_array_end = . ; }
 
     /* DATA memory starts at address 0.  So to avoid placing a valid static
        variable at the invalid NULL address, we introduce the .data.atzero
@@ -123,8 +131,10 @@ SECTIONS
     ${RELOCATING+ PROVIDE (_data_start = .) ; }
     *(.data)
     ${RELOCATING+ *(.data*)}
+    ${RELOCATING+ *(.data:*)}
     ${RELOCATING+ *(.rodata)  /* We need to include .rodata here if gcc is used.  */}
     ${RELOCATING+ *(.rodata.*) /* with -fdata-sections.  */}
+    ${RELOCATING+ *(.rodata:*)}
     ${RELOCATING+*(.gnu.linkonce.d*)}
     ${RELOCATING+*(.gnu.linkonce.r*)}
     ${RELOCATING+. = ALIGN(4);}
@@ -142,6 +152,7 @@ SECTIONS
     ${RELOCATING+ PROVIDE (_bss_start = .) ; }
     *(.bss)
     ${RELOCATING+ *(.bss.*)}
+    ${RELOCATING+ *(.bss:*)}
     ${RELOCATING+*(.gnu.linkonce.b*)}
     *(COMMON)
     ${RELOCATING+ PROVIDE (_bss_end = .) ; }
diff --git a/ld/testsuite/ld-pru/ldi32.d b/ld/testsuite/ld-pru/ldi32.d
index 123ead3..cc9b86d 100644
--- a/ld/testsuite/ld-pru/ldi32.d
+++ b/ld/testsuite/ld-pru/ldi32.d
@@ -8,5 +8,5 @@
 .*: +file format elf32-pru
 
 Disassembly of section .text:
-[0-9a-f]+ <[^>]*> ldi	r16, 48879
 [0-9a-f]+ <[^>]*> ldi	r16.w2, 57005
+[0-9a-f]+ <[^>]*> ldi	r16.w0, 48879
diff --git a/ld/testsuite/ld-pru/norelax_ldi32-data.d b/ld/testsuite/ld-pru/norelax_ldi32-data.d
index 47fc2c1..cc7140e 100644
--- a/ld/testsuite/ld-pru/norelax_ldi32-data.d
+++ b/ld/testsuite/ld-pru/norelax_ldi32-data.d
@@ -10,10 +10,10 @@
 .*: +file format elf32-pru
 
 Contents of section .text:
- [0-9a-f]+ f0efbe24 d0adde24 0f00f630 f0efbe24  .*
- [0-9a-f]+ d0adde24 f0cace24 d0000024 e0cace24  .*
- [0-9a-f]+ f0cace24 d0010024 f0efbe24 d0acde24  .*
- [0-9a-f]+ f0785624 d0341224 f0785624 d0000024  .*
+ [0-9a-f]+ d0adde24 90efbe24 0f00f630 d0adde24  .*
+ [0-9a-f]+ 90efbe24 d0000024 90cace24 e0cace24  .*
+ [0-9a-f]+ d0010024 90cace24 d0acde24 90efbe24  .*
+ [0-9a-f]+ d0341224 90785624 d0000024 90785624  .*
  [0-9a-f]+ f0120024 f100007e .*
 Contents of section .data:
  0000 00000000 48000020 40000000 12004000  .*
diff --git a/ld/testsuite/ld-pru/norelax_ldi32-dis.d b/ld/testsuite/ld-pru/norelax_ldi32-dis.d
index 072de5f..8f3be0f 100644
--- a/ld/testsuite/ld-pru/norelax_ldi32-dis.d
+++ b/ld/testsuite/ld-pru/norelax_ldi32-dis.d
@@ -9,21 +9,21 @@
 .*: +file format elf32-pru
 
 Disassembly of section .text:
-..000000 <[^>]*> ldi	r16, 48879
-..000004 <[^>]*> ldi	r16.w2, 57005
+..000000 <[^>]*> ldi	r16.w2, 57005
+..000004 <[^>]*> ldi	r16.w0, 48879
 ..000008 <[^>]*> loop	..000044 <__end_loop>, r22
-..00000c <[^>]*> ldi	r16, 48879
-..000010 <[^>]*> ldi	r16.w2, 57005
-..000014 <[^>]*> ldi	r16, 52938
-..000018 <[^>]*> ldi	r16.w2, 0
+..00000c <[^>]*> ldi	r16.w2, 57005
+..000010 <[^>]*> ldi	r16.w0, 48879
+..000014 <[^>]*> ldi	r16.w2, 0
+..000018 <[^>]*> ldi	r16.w0, 52938
 ..00001c <[^>]*> ldi	r0, 52938
-..000020 <[^>]*> ldi	r16, 52938
-..000024 <[^>]*> ldi	r16.w2, 1
-..000028 <[^>]*> ldi	r16, 48879
-..00002c <[^>]*> ldi	r16.w2, 57004
-..000030 <[^>]*> ldi	r16, 22136
-..000034 <[^>]*> ldi	r16.w2, 4660
-..000038 <[^>]*> ldi	r16, 22136
-..00003c <[^>]*> ldi	r16.w2, 0
+..000020 <[^>]*> ldi	r16.w2, 1
+..000024 <[^>]*> ldi	r16.w0, 52938
+..000028 <[^>]*> ldi	r16.w2, 57004
+..00002c <[^>]*> ldi	r16.w0, 48879
+..000030 <[^>]*> ldi	r16.w2, 4660
+..000034 <[^>]*> ldi	r16.w0, 22136
+..000038 <[^>]*> ldi	r16.w2, 0
+..00003c <[^>]*> ldi	r16.w0, 22136
 ..000040 <[^>]*> ldi	r16, 18
 ..000044 <[^>]*> qba	..000008 <__intermediate>
diff --git a/ld/testsuite/ld-pru/relax_ldi32-data.d b/ld/testsuite/ld-pru/relax_ldi32-data.d
index 2c24fe4..ffb5d81 100644
--- a/ld/testsuite/ld-pru/relax_ldi32-data.d
+++ b/ld/testsuite/ld-pru/relax_ldi32-data.d
@@ -10,10 +10,10 @@
 .*: +file format elf32-pru
 
 Contents of section .text:
- [0-9a-f]+ f0efbe24 d0adde24 0d00f630 f0efbe24  .*
- [0-9a-f]+ d0adde24 f0cace24 e0cace24 f0cace24  .*
- [0-9a-f]+ d0010024 f0efbe24 d0acde24 f0785624  .*
- [0-9a-f]+ d0341224 f0785624 f0100024 f300007e  .*
+ [0-9a-f]+ d0adde24 90efbe24 0d00f630 d0adde24  .*
+ [0-9a-f]+ 90efbe24 f0cace24 e0cace24 d0010024  .*
+ [0-9a-f]+ 90cace24 d0acde24 90efbe24 d0341224  .*
+ [0-9a-f]+ 90785624 f0785624 f0100024 f300007e  .*
 Contents of section .data:
  0000 00000000 40000020 38000000 10003800  .*
  0010 0e000000 f2ffffff 0e0038aa           .*
diff --git a/ld/testsuite/ld-pru/relax_ldi32-dis.d b/ld/testsuite/ld-pru/relax_ldi32-dis.d
index 1371f1c..31c7818 100644
--- a/ld/testsuite/ld-pru/relax_ldi32-dis.d
+++ b/ld/testsuite/ld-pru/relax_ldi32-dis.d
@@ -9,19 +9,19 @@
 .*: +file format elf32-pru
 
 Disassembly of section .text:
-..000000 <[^>]*> ldi	r16, 48879
-..000004 <[^>]*> ldi	r16.w2, 57005
+..000000 <[^>]*> ldi	r16.w2, 57005
+..000004 <[^>]*> ldi	r16.w0, 48879
 ..000008 <[^>]*> loop	..00003c <__end_loop>, r22
-..00000c <[^>]*> ldi	r16, 48879
-..000010 <[^>]*> ldi	r16.w2, 57005
+..00000c <[^>]*> ldi	r16.w2, 57005
+..000010 <[^>]*> ldi	r16.w0, 48879
 ..000014 <[^>]*> ldi	r16, 52938
 ..000018 <[^>]*> ldi	r0, 52938
-..00001c <[^>]*> ldi	r16, 52938
-..000020 <[^>]*> ldi	r16.w2, 1
-..000024 <[^>]*> ldi	r16, 48879
-..000028 <[^>]*> ldi	r16.w2, 57004
-..00002c <[^>]*> ldi	r16, 22136
-..000030 <[^>]*> ldi	r16.w2, 4660
+..00001c <[^>]*> ldi	r16.w2, 1
+..000020 <[^>]*> ldi	r16.w0, 52938
+..000024 <[^>]*> ldi	r16.w2, 57004
+..000028 <[^>]*> ldi	r16.w0, 48879
+..00002c <[^>]*> ldi	r16.w2, 4660
+..000030 <[^>]*> ldi	r16.w0, 22136
 ..000034 <[^>]*> ldi	r16, 22136
 ..000038 <[^>]*> ldi	r16, 16
 ..00003c <[^>]*> qba	..000008 <__intermediate>