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author | Nick Clifton <nickc@redhat.com> | 2002-08-28 10:38:51 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2002-08-28 10:38:51 +0000 |
commit | 026df7c5e64e4a8de40c8d744980b511bcce983d (patch) | |
tree | 5f4b6f8bf3dcf5b10eb51d25d82f5fac4e0f25ac /ld | |
parent | df44284ec4c9d3b10c45d9b09b5b6cd8dd8d8630 (diff) | |
download | gdb-026df7c5e64e4a8de40c8d744980b511bcce983d.zip gdb-026df7c5e64e4a8de40c8d744980b511bcce983d.tar.gz gdb-026df7c5e64e4a8de40c8d744980b511bcce983d.tar.bz2 |
Add TMS320C4x support
Diffstat (limited to 'ld')
-rw-r--r-- | ld/ChangeLog | 15 | ||||
-rw-r--r-- | ld/Makefile.am | 4 | ||||
-rw-r--r-- | ld/Makefile.in | 4 | ||||
-rw-r--r-- | ld/NEWS | 3 | ||||
-rw-r--r-- | ld/configure.tgt | 1 | ||||
-rw-r--r-- | ld/emulparams/tic3xcoff.sh | 9 | ||||
-rw-r--r-- | ld/emulparams/tic4xcoff.sh | 9 | ||||
-rw-r--r-- | ld/scripttempl/tic3xcoff.sc | 92 | ||||
-rw-r--r-- | ld/scripttempl/tic4xcoff.sc | 92 |
9 files changed, 229 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index f09a0ae..94e04ae 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,18 @@ +2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com> + + * Makefile.am: Add etic4xcoff.o in ALL_EMULATIONS list and + added makefile targets for this file. + * Makefile.in: Regenerate. + * configure.tgt: Added tic4x-coff and c4x-coff emulations. + * NEWS: Mention new port. + +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * emulparams/tic3xcoff.sh: New file. + * emulparams/tic4xcoff.sh: New file. + * scripttempl/tic3xcoff.sc: New file. + * scripttempl/tic4xcoff.sc: New file. + 2002-08-28 Alan Modra <amodra@bigpond.net.au> * emultempl/aix.em (gld${EMULATION_NAME}_parse_args): Replace strtoll, diff --git a/ld/Makefile.am b/ld/Makefile.am index 5f78386..c89d37b 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -282,6 +282,7 @@ ALL_EMULATIONS = \ esun4.o \ etic30aout.o \ etic30coff.o \ + etic4xcoff.o \ etic54xcoff.o \ etic80coff.o \ evanilla.o \ @@ -1078,6 +1079,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \ etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic30coff "$(tdir_tic30coff)" +etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \ + $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS} + ${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)" etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \ $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)" diff --git a/ld/Makefile.in b/ld/Makefile.in index 886dd4f..b038e17 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -393,6 +393,7 @@ ALL_EMULATIONS = \ esun4.o \ etic30aout.o \ etic30coff.o \ + etic4xcoff.o \ etic54xcoff.o \ etic80coff.o \ evanilla.o \ @@ -1801,6 +1802,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \ etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic30coff "$(tdir_tic30coff)" +etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \ + $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS} + ${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)" etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \ $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)" @@ -1,5 +1,8 @@ -*- text -*- +* Support for Texas Instruments TMS320C4x series of microcontrollers + contributed by Michael Hayes and Svein E. Seldal. + * Added --with-lib-path configure switch to specify default value for LIB_PATH. diff --git a/ld/configure.tgt b/ld/configure.tgt index 9ee6d34..0f1d1c9 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -498,6 +498,7 @@ rs6000-*-aix5*) targ_emul=aix5rs6 ;; rs6000-*-aix*) targ_emul=aixrs6 ;; tic30-*-*aout*) targ_emul=tic30aout ;; tic30-*-*coff*) targ_emul=tic30coff ;; +tic4x-*-* | c4x-*-*) targ_emul=tic4xcoff ;; tic54x-*-* | c54x*-*-*) targ_emul=tic54xcoff ;; tic80-*-*) targ_emul=tic80coff ;; v850-*-*) targ_emul=v850 ;; diff --git a/ld/emulparams/tic3xcoff.sh b/ld/emulparams/tic3xcoff.sh new file mode 100644 index 0000000..3d4fbf9 --- /dev/null +++ b/ld/emulparams/tic3xcoff.sh @@ -0,0 +1,9 @@ +SCRIPT_NAME=tic4xcoff +OUTPUT_FORMAT="coff2-c4x" +OUTPUT_ARCH="c3x" +ARCH=c3x +#ENTRY=_c_int00 +TEXT_START_ADDR=0x0080 +TARGET_PAGE_SIZE=0x1000 +TEMPLATE_NAME=ticoff +OUTPUT_FORMAT_TEMPLATE=tic4x diff --git a/ld/emulparams/tic4xcoff.sh b/ld/emulparams/tic4xcoff.sh new file mode 100644 index 0000000..d6b9dc6 --- /dev/null +++ b/ld/emulparams/tic4xcoff.sh @@ -0,0 +1,9 @@ +SCRIPT_NAME=tic4xcoff +OUTPUT_FORMAT="coff2-c4x" +OUTPUT_ARCH="c4x" +ARCH=c4x +#ENTRY=_c_int00 +TEXT_START_ADDR=0x0080 +TARGET_PAGE_SIZE=0x1000 +TEMPLATE_NAME=ticoff +OUTPUT_FORMAT_TEMPLATE=tic4x diff --git a/ld/scripttempl/tic3xcoff.sc b/ld/scripttempl/tic3xcoff.sc new file mode 100644 index 0000000..29dc400 --- /dev/null +++ b/ld/scripttempl/tic3xcoff.sc @@ -0,0 +1,92 @@ +# 32 interrupt vectors + 32 trap vectors each of 4 bytes +# The .bss and .data sections need to be contiguous for direct addressing +# The data page pointer gets loaded with the start of .bss +# TI C compiler uses .cinit to initialise variables in .bss + +test -z "$ENTRY" && ENTRY=_start +# These are substituted in as variables in order to get '}' in a shell +# conditional expansion. +INIT='.init : { *(.init) }' +FINI='.fini : { *(.fini) }' +cat <<EOF +OUTPUT_FORMAT("${OUTPUT_FORMAT}") +OUTPUT_ARCH("${OUTPUT_ARCH}") +${LIB_SEARCH_DIRS} + +ENTRY(${ENTRY}) +${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;} +${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;} + +SECTIONS +{ + .comms ${RELOCATING+ 64} : { + *(.comms) + } + .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : { + ${RELOCATING+ .bss = .;} + *(.bss) + *(COMMON) + ${RELOCATING+ end = .;} + ${RELOCATING+ _end = end;} + } + .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : + { + ${RELOCATING+ .data = .;} + *(.data) + ${RELOCATING+ edata = .;} + } + .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : + { + *(.const) + } + .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} : + { + ${RELOCATING+ cinit = .;} + *(.cinit) + LONG(0); + } + .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : { + ${RELOCATING+ .text = .;} + ${RELOCATING+ *(.init)} + *(.text) + ${CONSTRUCTING+ ___CTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.ctors)} + ${CONSTRUCTING+ LONG(0);} + ${CONSTRUCTING+ ___CTOR_END__ = .;} + ${CONSTRUCTING+ ___DTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.dtors)} + ${CONSTRUCTING+ LONG(0)} + ${CONSTRUCTING+ ___DTOR_END__ = .;} + ${RELOCATING+ *(.fini)} + ${RELOCATING+ etext = .;} + ${RELOCATING+ _etext = etext;} + } + .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} : + { + *(.stack) + ${RELOCATING+ . = . + __STACK_SIZE}; + } + .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} : + { + *(.sysmem) + } + .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} : + { + ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)}; + } + ${RELOCATING- ${INIT}} + ${RELOCATING- ${FINI}} + .stab 0 ${RELOCATING+(NOLOAD)} : + { + [ .stab ] + } + .stabstr 0 ${RELOCATING+(NOLOAD)} : + { + [ .stabstr ] + } +/* The TI tools sets cinit to -1 if the ram model is used. */ + ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;} +} +EOF diff --git a/ld/scripttempl/tic4xcoff.sc b/ld/scripttempl/tic4xcoff.sc new file mode 100644 index 0000000..29dc400 --- /dev/null +++ b/ld/scripttempl/tic4xcoff.sc @@ -0,0 +1,92 @@ +# 32 interrupt vectors + 32 trap vectors each of 4 bytes +# The .bss and .data sections need to be contiguous for direct addressing +# The data page pointer gets loaded with the start of .bss +# TI C compiler uses .cinit to initialise variables in .bss + +test -z "$ENTRY" && ENTRY=_start +# These are substituted in as variables in order to get '}' in a shell +# conditional expansion. +INIT='.init : { *(.init) }' +FINI='.fini : { *(.fini) }' +cat <<EOF +OUTPUT_FORMAT("${OUTPUT_FORMAT}") +OUTPUT_ARCH("${OUTPUT_ARCH}") +${LIB_SEARCH_DIRS} + +ENTRY(${ENTRY}) +${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;} +${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;} + +SECTIONS +{ + .comms ${RELOCATING+ 64} : { + *(.comms) + } + .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : { + ${RELOCATING+ .bss = .;} + *(.bss) + *(COMMON) + ${RELOCATING+ end = .;} + ${RELOCATING+ _end = end;} + } + .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : + { + ${RELOCATING+ .data = .;} + *(.data) + ${RELOCATING+ edata = .;} + } + .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : + { + *(.const) + } + .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} : + { + ${RELOCATING+ cinit = .;} + *(.cinit) + LONG(0); + } + .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : { + ${RELOCATING+ .text = .;} + ${RELOCATING+ *(.init)} + *(.text) + ${CONSTRUCTING+ ___CTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.ctors)} + ${CONSTRUCTING+ LONG(0);} + ${CONSTRUCTING+ ___CTOR_END__ = .;} + ${CONSTRUCTING+ ___DTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.dtors)} + ${CONSTRUCTING+ LONG(0)} + ${CONSTRUCTING+ ___DTOR_END__ = .;} + ${RELOCATING+ *(.fini)} + ${RELOCATING+ etext = .;} + ${RELOCATING+ _etext = etext;} + } + .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} : + { + *(.stack) + ${RELOCATING+ . = . + __STACK_SIZE}; + } + .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} : + { + *(.sysmem) + } + .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} : + { + ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)}; + } + ${RELOCATING- ${INIT}} + ${RELOCATING- ${FINI}} + .stab 0 ${RELOCATING+(NOLOAD)} : + { + [ .stab ] + } + .stabstr 0 ${RELOCATING+(NOLOAD)} : + { + [ .stabstr ] + } +/* The TI tools sets cinit to -1 if the ram model is used. */ + ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;} +} +EOF |