Add support for Xilinx MicroBlaze processor.

        * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
        * bfd/Makefile.in: Same.
        * bfd/archures.c: Add bfd_arch_microblaze.
        * bfd/bfd-in2.h: Regenerate.
        * bfd/config.bfd: Add microblaze target.
        * bfd/configure: Add bfd_elf32_microblaze_vec target.
        * bfd/configure.in: Same.
        * bfd/cpu-microblaze.c: New.
        * bfd/elf32-microblaze.c: New.
        * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
        * bfd/libbfd.h: Regenerate.
        * bfd/reloc.c: Add MICROBLAZE relocations.
        * bfd/section.c: Add struct relax_table and relax_count to section.
        * bfd/targets.c: Add bfd_elf32_microblaze_vec.
        * binutils/MAINTAINERS: Add self as maintainer.
        * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
        EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
        get_machine_name().
        * config.sub: Add microblaze target.
        * configure: Same.
        * configure.ac: Same.
        * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
        TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
        DEP_microblaze_elf target.
        * gas/Makefile.in: Same.
        * gas/config/tc-microblaze.c: Add MicroBlaze assembler.
        * gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
        * gas/configure: Add microblaze target.
        * gas/configure.in: Same.
        * gas/configure.tgt: Same.
        * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
        * gas/doc/Makefile.in: Same.
        * gas/doc/all.texi: Set MICROBLAZE.
        * gas/doc/as.texinfo: Add MicroBlaze doc links.
        * gas/doc/c-microblaze.texi: New MicroBlaze docs.
        * include/dis-asm.h: Decl print_insn_microblaze().
        * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
        * include/elf/microblaze.h: New reloc definitions.
        * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
        ALL_EMULATIONS, targets.
        * ld/Makefile.in: Same.
        * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
        * ld/emulparams/elf32mb_linux.sh: New.
        * ld/emulparams/elf32microblaze.sh. New.
        * ld/scripttempl/elfmicroblaze.sc: New.
        * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
        CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
        * opcodes/Makefile.in: Same.
        * opcodes/configure: Add bfd_microblaze_arch target.
        * opcodes/configure.in: Same.
        * opcodes/disassemble.c: Define ARCH_microblaze, return
        print_insn_microblaze().
        * opcodes/microblaze-dis.c: New MicroBlaze disassembler.
        * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
        * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.

10 files changed, 309 insertions, 18 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 742b567..554687f 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,13 @@
+2009-08-06  Michael Eager <eager@eagercon.com>
+
+	* Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to 
+	ALL_EMULATIONS, targets.
+	* Makefile.in: Regenerate.
+	* configure.tgt: Add microblaze*-linux*, microblaze* targets.
+	* emulparams/elf32mb_linux.sh: New.
+	* emulparams/elf32microblaze.sh. New.
+	* scripttempl/elfmicroblaze.sc: New. 
+
 2009-08-05  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 
 	* emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup
diff --git a/ld/Makefile.am b/ld/Makefile.am
index b4e291c..785966d 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -191,6 +191,8 @@ ALL_EMULATIONS = \
 	eelf32m32c.o \
 	eelf32mcore.o \
 	eelf32mep.o \
+	eelf32mb_linux.o \
+ 	eelf32microblaze.o \
 	eelf32mipswindiss.o \
 	eelf32mt.o \
 	eelf32openrisc.o \
@@ -858,6 +860,12 @@ eelf32lmip.c: $(srcdir)/emulparams/elf32lmip.sh \
   $(srcdir)/emulparams/elf32bmip.sh $(ELF_DEPS) \
   $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32lmip "$(tdir_elf32lmip)"
+eelf32mb_linux.c: $(srcdir)/emulparams/elf32mb_linux.sh \
+  $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32mb_linux "$(tdir_microblaze)"
+ eelf32microblaze.c: $(srcdir)/emulparams/elf32microblaze.sh \
+  $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32microblaze "$(tdir_microblaze)"
 eelf32mipswindiss.c: $(srcdir)/emulparams/elf32mipswindiss.sh $(ELF_DEPS) \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32mipswindiss "$(tdir_elf32mipswindiss)"
diff --git a/ld/Makefile.in b/ld/Makefile.in
index 213f3ea..9c768c4 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -456,6 +456,8 @@ ALL_EMULATIONS = \
 	eelf32m32c.o \
 	eelf32mcore.o \
 	eelf32mep.o \
+	eelf32mb_linux.o \
+ 	eelf32microblaze.o \
 	eelf32mipswindiss.o \
 	eelf32mt.o \
 	eelf32openrisc.o \
@@ -1705,6 +1707,12 @@ eelf32lmip.c: $(srcdir)/emulparams/elf32lmip.sh \
   $(srcdir)/emulparams/elf32bmip.sh $(ELF_DEPS) \
   $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32lmip "$(tdir_elf32lmip)"
+eelf32mb_linux.c: $(srcdir)/emulparams/elf32mb_linux.sh \
+  $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32mb_linux "$(tdir_microblaze)"
+ eelf32microblaze.c: $(srcdir)/emulparams/elf32microblaze.sh \
+  $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32microblaze "$(tdir_microblaze)"
 eelf32mipswindiss.c: $(srcdir)/emulparams/elf32mipswindiss.sh $(ELF_DEPS) \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32mipswindiss "$(tdir_elf32mipswindiss)"
diff --git a/ld/configure.tgt b/ld/configure.tgt
index fcb8eeb..d6d86ab 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -361,6 +361,9 @@ mcore-*-pe)		targ_emul=mcorepe ;
 mcore-*-elf)		targ_emul=elf32mcore
 			;;
 mep-*-elf)		targ_emul=elf32mep ;;
+microblaze*-linux*)
+			targ_emul="elf32mb_linux" ;;
+microblaze*)		targ_emul=elf32microblaze ;;
 mips*-*-pe)		targ_emul=mipspe ;
 			targ_extra_ofiles="deffilep.o pe-dll.o" ;;
 mips*-dec-ultrix*)	targ_emul=mipslit ;;
diff --git a/ld/emulparams/elf32mb_linux.sh b/ld/emulparams/elf32mb_linux.sh
new file mode 100644
index 0000000..3503bb1
--- /dev/null
+++ b/ld/emulparams/elf32mb_linux.sh
@@ -0,0 +1,17 @@
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf32-microblaze"
+TEXT_START_ADDR=0x10000000
+NONPAGED_TEXT_START_ADDR=0x28
+ALIGNMENT=4
+MAXPAGESIZE=0x1000
+COMMONPAGESIZE=0x1000
+ARCH=microblaze
+
+NOP=0x80000000
+
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+NO_SMALL_DATA=yes
+SEPARATE_GOTPLT=12
+      
diff --git a/ld/emulparams/elf32microblaze.sh b/ld/emulparams/elf32microblaze.sh
new file mode 100644
index 0000000..ccc20d1
--- /dev/null
+++ b/ld/emulparams/elf32microblaze.sh
@@ -0,0 +1,23 @@
+SCRIPT_NAME=elfmicroblaze
+OUTPUT_FORMAT="elf32-microblaze"
+#TEXT_START_ADDR=0
+NONPAGED_TEXT_START_ADDR=0x28
+ALIGNMENT=4
+MAXPAGESIZE=4
+ARCH=microblaze
+EMBEDDED=yes
+
+NOP=0x80000000
+
+# Hmmm, there's got to be a better way.  This sets the stack to the
+# top of the simulator memory (2^19 bytes).
+#PAGE_SIZE=0x1000
+#DATA_ADDR=0x10000
+#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }'
+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
+TEMPLATE_NAME=elf32
+#GENERATE_SHLIB_SCRIPT=yes
+
+    
diff --git a/ld/scripttempl/elf32cr16.sc b/ld/scripttempl/elf32cr16.sc
index 69b66e5..7c357c1 100644
--- a/ld/scripttempl/elf32cr16.sc
+++ b/ld/scripttempl/elf32cr16.sc
@@ -133,21 +133,21 @@ SECTIONS
    The heap and stack are aligned to the bus width, as a speed optimization
    for accessing data located there.  */
 
-  .heap :
+  .heap (NOLOAD) :
   {
     . = ALIGN(4);
     __HEAP_START = .;
     . += 0x2000; __HEAP_MAX = .;
   } > ram
 
-  .stack :
+  .stack (NOLOAD) :
   {
     . = ALIGN(4);
     . += 0x6000;
     __STACK_START = .;
   } > ram
 
-  .istack :
+  .istack (NOLOAD) :
   {
     . = ALIGN(4);
     . += 0x100;
diff --git a/ld/scripttempl/elf32cr16c.sc b/ld/scripttempl/elf32cr16c.sc
index 70cbb59..56bab60 100644
--- a/ld/scripttempl/elf32cr16c.sc
+++ b/ld/scripttempl/elf32cr16c.sc
@@ -31,18 +31,18 @@ SECTIONS
    there. The alignment to 4 bytes is compatible for both the CR16C
    bus width (2 bytes) and CR16CPlus bus width (4 bytes).  */
 
-  .text          : { __TEXT_START = .;   *(.text)                                        __TEXT_END = .; } > rom	
-  .rdata         : { __RDATA_START = .;  *(.rdata_4) *(.rdata_2) *(.rdata_1)             __RDATA_END = .; } > near_rom
-  .ctor ALIGN(4) : { __CTOR_LIST = .;    *(.ctors)                                       __CTOR_END = .; } > near_rom
-  .dtor ALIGN(4) : { __DTOR_LIST = .;    *(.dtors)                                       __DTOR_END = .; } > near_rom
-  .data          : { __DATA_START = .;   *(.data_4) *(.data_2) *(.data_1) *(.data)       __DATA_END = .; } > ram AT > rom
-  .bss (NOLOAD)  : { __BSS_START = .;    *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; } > ram
-  .nrdata        : { __NRDATA_START = .; *(.nrdat_4) *(.nrdat_2) *(.nrdat_1)             __NRDATA_END =  .; } > near_rom
-  .ndata         : { __NDATA_START = .;  *(.ndata_4) *(.ndata_2) *(.ndata_1)             __NDATA_END = .; } > near_ram AT > rom
-  .nbss (NOLOAD) : { __NBSS_START = .;   *(.nbss_4) *(.nbss_2) *(.nbss_1) *(.ncommon)    __NBSS_END = .; } > near_ram
-  .heap          : { . = ALIGN(4); __HEAP_START = .; . += 0x2000;                        __HEAP_MAX = .; } > near_ram
-  .stack         : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
-  .istack        : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; } > ram
+  .text            : { __TEXT_START = .;   *(.text)                                        __TEXT_END = .; } > rom	
+  .rdata           : { __RDATA_START = .;  *(.rdata_4) *(.rdata_2) *(.rdata_1)             __RDATA_END = .; } > near_rom
+  .ctor ALIGN(4)   : { __CTOR_LIST = .;    *(.ctors)                                       __CTOR_END = .; } > near_rom
+  .dtor ALIGN(4)   : { __DTOR_LIST = .;    *(.dtors)                                       __DTOR_END = .; } > near_rom
+  .data            : { __DATA_START = .;   *(.data_4) *(.data_2) *(.data_1) *(.data)       __DATA_END = .; } > ram AT > rom
+  .bss (NOLOAD)    : { __BSS_START = .;    *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; } > ram
+  .nrdata          : { __NRDATA_START = .; *(.nrdat_4) *(.nrdat_2) *(.nrdat_1)             __NRDATA_END =  .; } > near_rom
+  .ndata           : { __NDATA_START = .;  *(.ndata_4) *(.ndata_2) *(.ndata_1)             __NDATA_END = .; } > near_ram AT > rom
+  .nbss (NOLOAD)   : { __NBSS_START = .;   *(.nbss_4) *(.nbss_2) *(.nbss_1) *(.ncommon)    __NBSS_END = .; } > near_ram
+  .heap (NOLOAD)   : { . = ALIGN(4); __HEAP_START = .; . += 0x2000;                        __HEAP_MAX = .; } > near_ram
+  .stack (NOLOAD)  : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
+  .istack (NOLOAD) : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; } > ram
 }
 
 __DATA_IMAGE_START = LOADADDR(.data);
diff --git a/ld/scripttempl/elf32crx.sc b/ld/scripttempl/elf32crx.sc
index c3d6751..514254a 100644
--- a/ld/scripttempl/elf32crx.sc
+++ b/ld/scripttempl/elf32crx.sc
@@ -135,21 +135,21 @@ SECTIONS
    The heap and stack are aligned to the bus width, as a speed optimization
    for accessing data located there.  */
 
-  .heap :
+  .heap (NOLOAD) :
   {
     . = ALIGN(4);
     __HEAP_START = .;
     . += 0x2000; __HEAP_MAX = .;
   } > ram
 
-  .stack :
+  .stack (NOLOAD) :
   {
     . = ALIGN(4);
     . += 0x6000;
     __STACK_START = .;
   } > ram
 
-  .istack :
+  .istack (NOLOAD) :
   {
     . = ALIGN(4);
     . += 0x100;
diff --git a/ld/scripttempl/elfmicroblaze.sc b/ld/scripttempl/elfmicroblaze.sc
new file mode 100644
index 0000000..7677261
--- /dev/null
+++ b/ld/scripttempl/elfmicroblaze.sc
@@ -0,0 +1,222 @@
+# Adapted from mips.sc
+# These variables may be overridden by the emulation file.  The
+# defaults are appropriate for a DECstation running Ultrix.
+test -z "$ENTRY" && ENTRY=_start
+
+#test -z "$TEXT_START_ADDR" && TEXT_START_ADDR="0x0"
+
+CTOR=".ctors ${CONSTRUCTING-0} : 
+  {
+    ${CONSTRUCTING+${CTOR_START}}
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+
+    KEEP (*crtbegin.o(.ctors))
+
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    ${CONSTRUCTING+${CTOR_END}}
+  }"
+
+DTOR=" .dtors       ${CONSTRUCTING-0} :
+  {
+    ${CONSTRUCTING+${DTOR_START}}
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    ${CONSTRUCTING+${DTOR_END}}
+  }"
+
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
+	      "${LITTLE_OUTPUT_FORMAT}")
+/*${LIB_SEARCH_DIRS}*/
+${RELOCATING+${LIB_SEARCH_DIRS}}
+
+ENTRY(${ENTRY})
+
+_TEXT_START_ADDR = DEFINED(_TEXT_START_ADDR) ? _TEXT_START_ADDR : 0x50;		
+_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x0;
+_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;
+
+SECTIONS
+{
+  .vectors.reset 0x0 : { KEEP (*(.vectors.reset)) } = 0
+  .vectors.sw_exception 0x8 : { KEEP (*(.vectors.sw_exception)) } = 0
+  .vectors.interrupt 0x10 : { KEEP (*(.vectors.interrupt)) } = 0
+  .vectors.debug_sw_break 0x18 : { KEEP (*(.vectors.debug_sw_break)) } = 0
+  .vectors.hw_exception 0x20 : { KEEP (*(.vectors.hw_exception)) } = 0
+
+  ${RELOCATING+. = _TEXT_START_ADDR;}
+
+  ${RELOCATING+ _ftext  =  .;}
+  .text : {
+    ${RELOCATING+*(.text)}
+    ${RELOCATING+*(.text.*)}
+    ${RELOCATING+*(.gnu.linkonce.t.*)}
+  }
+  ${RELOCATING+ _etext  =  .;}
+
+  .init : { KEEP (*(.init))	} =0
+  .fini : { KEEP (*(.fini))	} =0
+
+  ${RELOCATING+PROVIDE (__CTOR_LIST__ = .);}
+  ${RELOCATING+PROVIDE (___CTOR_LIST__ = .);}
+  ${RELOCATING+${CTOR}}
+  ${RELOCATING+PROVIDE (__CTOR_END__ = .);}
+  ${RELOCATING+PROVIDE (___CTOR_END__ = .);}
+
+  ${RELOCATING+PROVIDE (__DTOR_LIST__ = .);}
+  ${RELOCATING+PROVIDE (___DTOR_LIST__ = .);}
+  ${RELOCATING+${DTOR}}
+  ${RELOCATING+PROVIDE (__DTOR_END__ = .);}
+  ${RELOCATING+PROVIDE (___DTOR_END__ = .);}
+
+  ${RELOCATING+ . = ALIGN(4);}
+   ${RELOCATING+ _frodata = . ;}
+  .rodata : {
+    ${RELOCATING+*(.rodata)}
+    ${RELOCATING+*(.rodata.*)}
+    ${RELOCATING+*(.gnu.linkonce.r.*)}
+    ${CONSTRUCTING+CONSTRUCTORS}; /* Is this needed? */
+  }
+  ${RELOCATING+ _erodata = .;}
+
+  /* Alignments by 8 to ensure that _SDA2_BASE_ on a word boundary */
+  /* Note that .sdata2 and .sbss2 must be contiguous */
+  ${RELOCATING+. = ALIGN(8);}
+  ${RELOCATING+ _ssrw = .;}
+  .sdata2 : {
+    ${RELOCATING+*(.sdata2)}
+    ${RELOCATING+*(.sdata2.*)}
+    ${RELOCATING+*(.gnu.linkonce.s2.*)}
+  }
+  ${RELOCATING+. = ALIGN(4);}
+  .sbss2 : {
+    ${RELOCATING+PROVIDE (__sbss2_start = .);}	
+    ${RELOCATING+*(.sbss2)}
+    ${RELOCATING+*(.sbss2.*)}
+    ${RELOCATING+*(.gnu.linkonce.sb2.*)}
+    ${RELOCATING+PROVIDE (__sbss2_end = .);}
+  }
+  ${RELOCATING+. = ALIGN(8);}
+  ${RELOCATING+ _essrw = .;}
+  ${RELOCATING+ _ssrw_size = _essrw - _ssrw;}
+  ${RELOCATING+ PROVIDE (_SDA2_BASE_ = _ssrw + (_ssrw_size / 2 ));}
+
+  ${RELOCATING+ . = ALIGN(4);}
+  ${RELOCATING+ _fdata = .;}
+  .data : {
+    ${RELOCATING+*(.data)}
+    ${RELOCATING+*(.gnu.linkonce.d.*)}
+    ${CONSTRUCTING+CONSTRUCTORS}; /* Is this needed? */
+  }
+  ${RELOCATING+ _edata = . ;}
+  
+   /* Added to handle pic code */
+  .got : {  
+    ${RELOCATING+*(.got)}
+  }
+
+  .got1 : {  
+    ${RELOCATING+*(.got1)}
+  }
+
+  .got2 : {  
+    ${RELOCATING+*(.got2)}
+  }
+
+  /* Added by Sathya to handle C++ exceptions */
+  .eh_frame : {  
+    ${RELOCATING+*(.eh_frame)}
+  }
+  
+  .jcr : {  
+    ${RELOCATING+*(.jcr)}
+  }
+
+  .gcc_except_table : {  
+    ${RELOCATING+*(.gcc_except_table)}
+  }
+
+  /* Alignments by 8 to ensure that _SDA_BASE_ on a word boundary */
+  /* Note that .sdata and .sbss must be contiguous */
+  ${RELOCATING+. = ALIGN(8);}
+  ${RELOCATING+ _ssro = .;}
+  .sdata : {
+    ${RELOCATING+*(.sdata)}
+    ${RELOCATING+*(.sdata.*)}
+    ${RELOCATING+*(.gnu.linkonce.s.*)}
+  }
+  ${RELOCATING+. = ALIGN(4);}
+  .sbss : {
+    ${RELOCATING+PROVIDE (__sbss_start = .);}	
+    ${RELOCATING+*(.sbss)}
+    ${RELOCATING+*(.sbss.*)}
+    ${RELOCATING+*(.gnu.linkonce.sb.*)}
+    ${RELOCATING+PROVIDE (__sbss_end = .);}
+  }
+  ${RELOCATING+. = ALIGN(8);}
+  ${RELOCATING+ _essro = .;}
+  ${RELOCATING+ _ssro_size = _essro - _ssro;}
+  ${RELOCATING+PROVIDE (_SDA_BASE_ = _ssro + (_ssro_size / 2 ));}
+
+  ${RELOCATING+ . = ALIGN(4);}
+  ${RELOCATING+ _fbss = .;}
+  .bss : {
+    ${RELOCATING+PROVIDE (__bss_start = .);}	
+    ${RELOCATING+*(.bss)}
+    ${RELOCATING+*(.bss.*)}
+    ${RELOCATING+*(.gnu.linkonce.b.*)}
+    ${RELOCATING+*(COMMON)}
+    ${RELOCATING+. = ALIGN(4);}  
+    
+    ${RELOCATING+PROVIDE (__bss_end = .);}
+
+  }
+
+  ${RELOCATING+ . = ALIGN(4);}
+
+  .heap : {
+    ${RELOCATING+ _heap = .;}
+    ${RELOCATING+ _heap_start = .;}
+    ${RELOCATING+ . += _HEAP_SIZE;}
+    ${RELOCATING+ _heap_end = .;}
+  } 
+
+  ${RELOCATING+ . = ALIGN(4);}
+
+  .stack : {
+    ${RELOCATING+ _stack_end = .;}
+    ${RELOCATING+ . += _STACK_SIZE;}
+    ${RELOCATING+ . = ALIGN(8);}
+    ${RELOCATING+ _stack = .;}
+    ${RELOCATING+ _end = .;}
+  }
+
+  .tdata : {  
+    ${RELOCATING+*(.tdata)}
+    ${RELOCATING+*(.tdata.*)}
+    ${RELOCATING+*(.gnu.linkonce.td.*)}
+  }
+  .tbss : {  
+    ${RELOCATING+*(.tbss)}
+    ${RELOCATING+*(.tbss.*)}
+    ${RELOCATING+*(.gnu.linkonce.tb.*)}
+  }
+}
+EOF