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authorYufeng Zhang <yufeng.zhang@arm.com>2013-06-14 16:07:20 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2013-06-14 16:07:20 +0000
commit2532064ada52626ab032fa0be568f2c27535c8b8 (patch)
tree19241e8814f4d129fffb9161c5688729ffff2a11 /ld
parentaa489d7c4a270e6f87f7111c40c3ff39d9ae9270 (diff)
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* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26, R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and R_AARCH64_GOT_LD_PREL19. ld/testsuite/ * ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'. * ld-aarch64/ifunc-7c.d: New test.
Diffstat (limited to 'ld')
-rw-r--r--ld/testsuite/ChangeLog5
-rw-r--r--ld/testsuite/ld-aarch64/aarch64-elf.exp1
-rw-r--r--ld/testsuite/ld-aarch64/ifunc-7c.d19
3 files changed, 25 insertions, 0 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 202c1eb..17f74b3 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,10 @@
2013-06-14 Yufeng Zhang <yufeng.zhang@arm.com>
+ * ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
+ * ld-aarch64/ifunc-7c.d: New test.
+
+2013-06-14 Yufeng Zhang <yufeng.zhang@arm.com>
+
* ld-aarch64/ifunc-1-local.d: Replace hard-coded immediate offset
with regexp.
* ld-aarch64/ifunc-1.d: Likewise.
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 58236e2..5c150dd 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -133,6 +133,7 @@ run_dump_test "ifunc-6a"
run_dump_test "ifunc-6b"
run_dump_test "ifunc-7a"
run_dump_test "ifunc-7b"
+run_dump_test "ifunc-7c"
run_dump_test "ifunc-8"
run_dump_test "ifunc-9"
run_dump_test "ifunc-10"
diff --git a/ld/testsuite/ld-aarch64/ifunc-7c.d b/ld/testsuite/ld-aarch64/ifunc-7c.d
new file mode 100644
index 0000000..1967742
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/ifunc-7c.d
@@ -0,0 +1,19 @@
+#source: ifunc-7.s
+#ld: -shared
+#objdump: -dr -j .text
+#target: aarch64*-*-*
+
+# Check if adrp and ldr have been relocated correctly.
+
+.*: file format elf.+aarch64.*
+
+
+Disassembly of section \.text:
+
+[0-9a-f]+ <foo>:
+ [0-9a-f]+: d65f03c0 ret
+
+[0-9a-f]+ <__start>:
+ [0-9a-f]+: [0-9a-f]+ bl [0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt>
+ [0-9a-f]+: [0-9a-f]+ adrp x0, [0-9]+ <__start\+0x[0-9a-f]+>
+ [0-9a-f]+: [0-9a-f]+ ldr x0, \[x0,.+\]