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authorDenis Chertykov <chertykov@gmail.com>2016-06-09 19:17:43 +0300
committerDenis Chertykov <chertykov@gmail.com>2016-06-09 19:17:43 +0300
commit5c41dbc302c2dd87e201e4fd1d9ae3186f6e51a0 (patch)
treef97034bca2d7f3fa8d45fc6b6931d9117a6de79e /ld
parent1857fe72aff6f254217956d141bff4b9ca454bc5 (diff)
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Fix PR 20221 - adjust syms and relocs only if relax shrunk section.
This patch fixes an edge case in linker relaxation that causes symbol values to be computed incorrectly in the presence of align directives in input source code. bfd/ * elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms and relocs only if shrinking occurred. ld/ * testsuite/ld-avr/avr-prop-5.d: New. * testsuite/ld-avr/avr-prop-5.s: New.
Diffstat (limited to 'ld')
-rw-r--r--ld/ChangeLog7
-rw-r--r--ld/testsuite/ld-avr/avr-prop-5.d10
-rw-r--r--ld/testsuite/ld-avr/avr-prop-5.s7
3 files changed, 24 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index cbb98e3..11470c5 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,4 +1,11 @@
+2016-06-08 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ PR ld/20221
+ * testsuite/ld-avr/avr-prop-5.d: New.
+ * testsuite/ld-avr/avr-prop-5.s: New.
+
2016-06-09 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+
* testsuite/ld-avr/lds-mega.d: New test.
* testsuite/ld-avr/lds-mega.s: New test source.
* testsuite/ld-avr/lds-tiny.d: New test.
diff --git a/ld/testsuite/ld-avr/avr-prop-5.d b/ld/testsuite/ld-avr/avr-prop-5.d
new file mode 100644
index 0000000..5f62ba3
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-5.d
@@ -0,0 +1,10 @@
+#name: AVR .avr.prop, single .align proper sym val test.
+#as: -mmcu=avrxmega2 -mlink-relax
+#ld: -mavrxmega2 --relax
+#source: avr-prop-5.s
+#objdump: -S
+#target: avr-*-*
+
+#...
+ 0: 00 d0\s+rcall\s+\.\+0\s+; 0x2 <dest>
+#... \ No newline at end of file
diff --git a/ld/testsuite/ld-avr/avr-prop-5.s b/ld/testsuite/ld-avr/avr-prop-5.s
new file mode 100644
index 0000000..6a3359a
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-5.s
@@ -0,0 +1,7 @@
+ .text
+ .global _start, dest
+_start:
+ CALL dest
+ .align 1
+dest:
+ NOP