bfd:

	* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

71 files changed, 828 insertions, 5 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index bf0c9bf..572610b 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,12 @@
+2010-03-25  Joseph Myers  <joseph@codesourcery.com>
+
+	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
+	eelf32_tic6x_le.o.
+	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
+	* NEWS: Add news entry for TI C6X support.
+	* configure.tgt (tic6x-*-*): New.
+	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
+
 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 
 	* scripttempl/elf.sc (RODATA_NAME, SDATA_NAME, SBSS_NAME,
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 92b77bd..010fb55 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -165,6 +165,8 @@ ALL_EMULATIONS = \
 	eelf32_sparc.o \
 	eelf32_sparc_sol2.o \
 	eelf32_sparc_vxworks.o \
+	eelf32_tic6x_be.o \
+	eelf32_tic6x_le.o \
 	eelf32b4300.o \
 	eelf32bfin.o \
 	eelf32bfinfd.o \
@@ -773,6 +775,12 @@ eelf32bfinfd.c: $(srcdir)/emulparams/elf32bfinfd.sh $(srcdir)/emulparams/bfin.sh
 eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
   $(ELF_GEN_DEPS) $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32_tic6x_be.c: $(srcdir)/emulparams/elf32_tic6x_be.sh \
+  $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32_tic6x_be "$(tdir_elf32_tic6x_be)"
+eelf32_tic6x_le.c: $(srcdir)/emulparams/elf32_tic6x_le.sh \
+  $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32_tic6x_le "$(tdir_elf32_tic6x_le)"
 eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
   $(ELF_DEPS) $(srcdir)/emultempl/needrelax.em \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
diff --git a/ld/Makefile.in b/ld/Makefile.in
index b17c822..5bbb899 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -453,6 +453,8 @@ ALL_EMULATIONS = \
 	eelf32_sparc.o \
 	eelf32_sparc_sol2.o \
 	eelf32_sparc_vxworks.o \
+	eelf32_tic6x_be.o \
+	eelf32_tic6x_le.o \
 	eelf32b4300.o \
 	eelf32bfin.o \
 	eelf32bfinfd.o \
@@ -969,6 +971,8 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_sparc_sol2.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_sparc_vxworks.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_spu.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_be.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_tic6x_le.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32b4300.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfin.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfinfd.Po@am__quote@
@@ -2122,6 +2126,12 @@ eelf32bfinfd.c: $(srcdir)/emulparams/elf32bfinfd.sh $(srcdir)/emulparams/bfin.sh
 eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
   $(ELF_GEN_DEPS) $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32_tic6x_be.c: $(srcdir)/emulparams/elf32_tic6x_be.sh \
+  $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32_tic6x_be "$(tdir_elf32_tic6x_be)"
+eelf32_tic6x_le.c: $(srcdir)/emulparams/elf32_tic6x_le.sh \
+  $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32_tic6x_le "$(tdir_elf32_tic6x_le)"
 eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
   $(ELF_DEPS) $(srcdir)/emultempl/needrelax.em \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
diff --git a/ld/NEWS b/ld/NEWS
index b2a94f5..bd561fb 100644
--- a/ld/NEWS
+++ b/ld/NEWS
@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for the TMS320C6000 (TI C6X) processor family.
+
 * --add-needed renamed to --copy-dt-needed-entries in order to avoid confusion
   with --as-needed option.
 
diff --git a/ld/configure.tgt b/ld/configure.tgt
index d968d83..c519ba7 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -621,6 +621,9 @@ tic30-*-*aout*)		targ_emul=tic30aout ;;
 tic30-*-*coff*)		targ_emul=tic30coff ;;
 tic4x-*-* | c4x-*-*)    targ_emul=tic4xcoff ; targ_extra_emuls="tic3xcoff tic3xcoff_onchip" ;;
 tic54x-*-* | c54x*-*-*)	targ_emul=tic54xcoff ;;
+tic6x-*-*)		targ_emul=elf32_tic6x_le
+			targ_extra_emuls="elf32_tic6x_be"
+			;;
 tic80-*-*)		targ_emul=tic80coff
 			;;
 v850-*-*)		targ_emul=v850 ;;
diff --git a/ld/emulparams/elf32_tic6x_be.sh b/ld/emulparams/elf32_tic6x_be.sh
new file mode 100644
index 0000000..648320f
--- /dev/null
+++ b/ld/emulparams/elf32_tic6x_be.sh
@@ -0,0 +1,2 @@
+. ${srcdir}/emulparams/elf32_tic6x_le.sh
+OUTPUT_FORMAT="elf32-tic6x-be"
diff --git a/ld/emulparams/elf32_tic6x_le.sh b/ld/emulparams/elf32_tic6x_le.sh
new file mode 100644
index 0000000..b9a5a96
--- /dev/null
+++ b/ld/emulparams/elf32_tic6x_le.sh
@@ -0,0 +1,26 @@
+SCRIPT_NAME=elf
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-tic6x-le"
+# This address is an arbitrary value expected to be suitable for
+# semihosting simulator use, but not on hardware where it is expected
+# to be overridden.
+TEXT_START_ADDR=0x8000
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+ARCH=tic6x
+EXECUTABLE_SYMBOLS="EXTERN (__c6xabi_DSBT_BASE);"
+SDATA_START_SYMBOLS="PROVIDE_HIDDEN (__c6xabi_DSBT_BASE = .);"
+# ".bss" is near (small) BSS, ".far" is far (normal) BSS, ".const" is
+# far read-only data, ".rodata" is near read-only data.  ".neardata"
+# is near (small) data, ".fardata" is (along with .data) far data.
+RODATA_NAME="const"
+SDATA_NAME="neardata"
+SBSS_NAME="bss"
+BSS_NAME="far"
+OTHER_SDATA_SECTIONS=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.*}) }"
+OTHER_READONLY_RELOC_SECTIONS="
+  .rel.rodata   ${RELOCATING-0} : { *(.rel.rodata${RELOCATING+ .rel.rodata.*}) }
+  .rela.rodata  ${RELOCATING-0} : { *(.rela.rodata${RELOCATING+ .rela.rodata.*}) }"
+OTHER_READWRITE_SECTIONS=".fardata ${RELOCATING-0} : { *(.fardata${RELOCATING+ .fardata.*}) }"
+OTHER_READWRITE_RELOC_SECTIONS="
+  .rel.fardata     ${RELOCATING-0} : { *(.rel.fardata${RELOCATING+ .rel.fardata.*}) }
+  .rela.fardata    ${RELOCATING-0} : { *(.rela.fardata${RELOCATING+ .rela.fardata.*}) }"
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index dd02aef..e8f3f59 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2010-03-25  Joseph Myers  <joseph@codesourcery.com>
+
+	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
+	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
+	* ld-tic6x: New directory and testcases.
+
 2010-03-19  Jie Zhang  <jie@codesourcery.com>
 
 	PR ld/11304
diff --git a/ld/testsuite/ld-elf/flags1.d b/ld/testsuite/ld-elf/flags1.d
index 2d079c0..35ad981 100644
--- a/ld/testsuite/ld-elf/flags1.d
+++ b/ld/testsuite/ld-elf/flags1.d
@@ -3,11 +3,12 @@
 #objcopy_linked_file: --set-section-flags .post_text_reserve=contents,alloc,load,readonly,code 
 #readelf: -l --wide
 #xfail: "arm*-*-*" "xscale-*-*"
-#xfail: "avr-*-*" "dlx-*-*" "h8300-*-*" "m32r-*-*" "msp430-*-*"
+#xfail: "avr-*-*" "dlx-*-*" "h8300-*-*" "m32r-*-*" "msp430-*-*" "tic6x-*-*"
 #xfail: "*-*-hpux*"
 # Fails on the ARM because the .section type character is % rather than @.
-# Fails on the AVR, DLX, H8300, M32R and MSP430 because the two sections
-#  are not merged into one segment.  (There is no good reason why they have to be).
+# Fails on the AVR, DLX, H8300, M32R, MSP430 and TI C6X because the two
+#  sections are not merged into one segment.  (There is no good reason why
+#  they have to be).
 # Fails on HPUX systems because the .type pseudo-op behaves differently.
 
 #...
diff --git a/ld/testsuite/ld-elf/merge.d b/ld/testsuite/ld-elf/merge.d
index c470d09..83b5698 100644
--- a/ld/testsuite/ld-elf/merge.d
+++ b/ld/testsuite/ld-elf/merge.d
@@ -5,7 +5,8 @@
 #xfail: "dlx-*-*" "fr30-*-*" "frv-*-*" "hppa*64*-*-*" "h8300-*-*" "score-*-*"
 #xfail: "i370-*-*" "i860-*-*" "i960-*-*" "ip2k-*-*" "iq2000-*-*" "lm32-*-*"
 #xfail: "mcore-*-*" "mn102*-*-*" "mips*-*-*" "ms1-*-*" "msp430-*-*" "mep-*-*"
-#xfail: "or32-*-*" "pj-*-*" "sparc*-*-*" "vax-*-*" "xstormy16-*-*" "xtensa*-*-*"
+#xfail: "or32-*-*" "pj-*-*" "sparc*-*-*" "tic6x-*-*" "vax-*-*" "xstormy16-*-*"
+#xfail: "xtensa*-*-*"
 
 .*:     file format .*elf.*
 
diff --git a/ld/testsuite/ld-elf/sec-to-seg.exp b/ld/testsuite/ld-elf/sec-to-seg.exp
index a576fce..846a19f 100644
--- a/ld/testsuite/ld-elf/sec-to-seg.exp
+++ b/ld/testsuite/ld-elf/sec-to-seg.exp
@@ -1,6 +1,6 @@
 # Test the assigment of sections to segments.
 #
-# Copyright 2008   Free Software Foundation, Inc.
+# Copyright 2008, 2010   Free Software Foundation, Inc.
 # Contributed by Red Hat.
 #
 # This file is part of the GNU Binutils.
@@ -83,6 +83,7 @@ if {    [istarget avr-*-*]
      || [istarget m32r-*-*]
      || [istarget m88k-*-*]
      || [istarget msp430-*-*]
+     || [istarget tic6x-*-*]
     } {
     set B_test_same_seg 0
 } else {
diff --git a/ld/testsuite/ld-tic6x/data-reloc-global.d b/ld/testsuite/ld-tic6x/data-reloc-global.d
new file mode 100644
index 0000000..416f9d3
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-global.d
@@ -0,0 +1,12 @@
+#name: C6X data relocations, global symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym sff=0xff --defsym sffff=0xffff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffff80=0xffffff80 --defsym sffffffff=0xffffffff
+#source: data-reloc-global.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+Contents of section \.data:
+[ \t]*0080 00000080 ffffffff 00000000 feffffff  .*
+[ \t]*0090 00000000 ffffffff 00800080 0000ffff  .*
+[ \t]*00a0 808000                               .*
diff --git a/ld/testsuite/ld-tic6x/data-reloc-global.s b/ld/testsuite/ld-tic6x/data-reloc-global.s
new file mode 100644
index 0000000..6a03376
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-global.s
@@ -0,0 +1,23 @@
+.globl s0
+.globl sff
+.globl sffff
+.globl s80000000
+.globl sffff8000
+.globl sffffff80
+.globl sffffffff
+.data
+	.word s80000000
+	.word sffffffff
+	.word s0
+	.word sffffffff+0xffffffff
+	.word s80000000+0x80000000
+	.short sffffffff
+	.short sffff
+	.short sffff8000
+	.short s0-0x8000
+	.short s80000000+0x80000000
+	.byte sffffffff
+	.byte sff
+	.byte sffffff80
+	.byte s0-0x80
+	.byte s80000000+0x80000000
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local-1.s b/ld/testsuite/ld-tic6x/data-reloc-local-1.s
new file mode 100644
index 0000000..d5cc7cf
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local-1.s
@@ -0,0 +1,5 @@
+.data
+a:
+	.word a
+b:
+	.word b
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local-2.s b/ld/testsuite/ld-tic6x/data-reloc-local-2.s
new file mode 100644
index 0000000..2e9196b
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local-2.s
@@ -0,0 +1,8 @@
+.data
+c:
+	.word d
+d:
+	.word c
+	.short d
+	.byte c
+	.byte d
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local-r.d b/ld/testsuite/ld-tic6x/data-reloc-local-r.d
new file mode 100644
index 0000000..0f5567b
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local-r.d
@@ -0,0 +1,23 @@
+#name: C6X data relocations, local symbols, -r
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: data-reloc-local-1.s
+#source: data-reloc-local-2.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+RELOCATION RECORDS FOR \[\.data\]:
+OFFSET   TYPE              VALUE 
+0+ R_C6000_ABS32     \.data
+0+4 R_C6000_ABS32     \.data\+0x00000004
+0+8 R_C6000_ABS32     \.data\+0x0000000c
+0+c R_C6000_ABS32     \.data\+0x00000008
+0+10 R_C6000_ABS16     \.data\+0x0000000c
+0+12 R_C6000_ABS8      \.data\+0x00000008
+0+13 R_C6000_ABS8      \.data\+0x0000000c
+
+
+Contents of section \.data:
+[ \t]*0000 00000000 00000000 00000000 00000000  .*
+[ \t]*0010 00000000                             .*
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local.d b/ld/testsuite/ld-tic6x/data-reloc-local.d
new file mode 100644
index 0000000..13d6f75
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local.d
@@ -0,0 +1,12 @@
+#name: C6X data relocations, local symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: data-reloc-local-1.s
+#source: data-reloc-local-2.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+Contents of section \.data:
+[ \t]*0080 80000000 84000000 8c000000 88000000  .*
+[ \t]*0090 8c00888c                             .*
diff --git a/ld/testsuite/ld-tic6x/generic.ld b/ld/testsuite/ld-tic6x/generic.ld
new file mode 100644
index 0000000..2e9c5e8
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/generic.ld
@@ -0,0 +1,8 @@
+SECTIONS
+{
+  . = 0x80;
+  .data : { *(.data*) }
+  . = 0x10000000;
+  .text : { *(.text*) }
+  /DISCARD/ : { *(*) }
+}
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-global.d b/ld/testsuite/ld-tic6x/mvk-reloc-global.d
new file mode 100644
index 0000000..8eadae7
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-global.d
@@ -0,0 +1,26 @@
+#name: C6X MVK relocations, global symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym s7fff=0x7fff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffffff=0xffffffff
+#source: mvk-reloc-global.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+10000004:[ \t]+00c00068[ \t]+mvkh \.S1 2147483648,a1
+10000008:[ \t]+00ffffa8[ \t]+mvk \.S1 -1,a1
+1000000c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1
+10000010:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+10000014:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+10000018:[ \t]+00ffff28[ \t]+mvk \.S1 -2,a1
+1000001c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1
+10000020:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+10000024:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+10000028:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+1000002c:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+10000030:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-global.s b/ld/testsuite/ld-tic6x/mvk-reloc-global.s
new file mode 100644
index 0000000..ef13d7a
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-global.s
@@ -0,0 +1,20 @@
+.globl s0
+.globl s7fff
+.globl s80000000
+.globl sffff8000
+.globl sffffffff
+.text
+.nocmp
+	mvkl .S1 s80000000,a1
+	mvkh .S1 s80000000,a1
+	mvkl .S1 sffffffff,a1
+	mvkh .S1 sffffffff,a1
+	mvkl .S1 s0,a1
+	mvkh .S1 s0,a1
+	mvkl .S1 sffffffff+0xffffffff,a1
+	mvkh .S1 sffffffff+0xffffffff,a1
+	mvkl .S1 s80000000+0x80000000,a1
+	mvkh .S1 s80000000+0x80000000,a1
+	mvk .S1 sffff8000,a1
+	mvk .S1 s0-0x8000,a1
+	mvk .S1 s7fff,a1
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-1.s b/ld/testsuite/ld-tic6x/mvk-reloc-local-1.s
new file mode 100644
index 0000000..f5de8b6
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-1.s
@@ -0,0 +1,12 @@
+.text
+.nocmp
+	mvk .S1 a,a1
+	mvkl .S1 b,a2
+	mvkh .S1 c,a3
+.data
+a:
+	.word 0
+b:
+	.word 0
+c:
+	.word 0
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-2.s b/ld/testsuite/ld-tic6x/mvk-reloc-local-2.s
new file mode 100644
index 0000000..2f9952d
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-2.s
@@ -0,0 +1,12 @@
+.text
+.nocmp
+	mvk .S1 d,a1
+	mvkl .S1 e,a2
+	mvkh .S1 f-0x100,a3
+.data
+d:
+	.word 0
+e:
+	.word 0
+f:
+	.word 0
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d b/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d
new file mode 100644
index 0000000..8657fd0
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d
@@ -0,0 +1,27 @@
+#name: C6X MVK relocations, local symbols, -r
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: mvk-reloc-local-1.s
+#source: mvk-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*0: R_C6000_ABS_S16[ \t]+\.data
+[ \t]*4:[ \t]+01000028[ \t]+mvk \.S1 0,a2
+[ \t]*4: R_C6000_ABS_L16[ \t]+\.data\+0x4
+[ \t]*8:[ \t]+01800068[ \t]+mvkh \.S1 0,a3
+[ \t]*8: R_C6000_ABS_H16[ \t]+\.data\+0x8
+[ \t]*\.\.\.
+[ \t]*20:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*20: R_C6000_ABS_S16[ \t]+\.data\+0xc
+[ \t]*24:[ \t]+01000028[ \t]+mvk \.S1 0,a2
+[ \t]*24: R_C6000_ABS_L16[ \t]+\.data\+0x10
+[ \t]*28:[ \t]+01800068[ \t]+mvkh \.S1 0,a3
+[ \t]*28: R_C6000_ABS_H16[ \t]+\.data\+0xffffff14
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local.d b/ld/testsuite/ld-tic6x/mvk-reloc-local.d
new file mode 100644
index 0000000..1b10c4d
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local.d
@@ -0,0 +1,21 @@
+#name: C6X MVK relocations, local symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: mvk-reloc-local-1.s
+#source: mvk-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00804028[ \t]+mvk \.S1 128,a1
+10000004:[ \t]+01004228[ \t]+mvk \.S1 132,a2
+10000008:[ \t]+01800068[ \t]+mvkh \.S1 0,a3
+[ \t]*\.\.\.
+10000020:[ \t]+00804628[ \t]+mvk \.S1 140,a1
+10000024:[ \t]+01004828[ \t]+mvk \.S1 144,a2
+10000028:[ \t]+01ffffe8[ \t]+mvkh \.S1 4294901760,a3
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-global.d b/ld/testsuite/ld-tic6x/pcrel-reloc-global.d
new file mode 100644
index 0000000..dbf6caa
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-global.d
@@ -0,0 +1,20 @@
+#name: C6X PC-relative relocations, global symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s7a=0x0fffff00 --defsym s7b=0x100000fc --defsym s10a=0x0ffff800 --defsym s10b=0x100007fc --defsym s12a=0x0fffe000 --defsym s12b=0x10001ffc --defsym s21a=0x0fc00000 --defsym s21b=0x103ffffc
+#source: pcrel-reloc-global.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00c00162[ \t]+addkpc \.S2 fffff00 <[^>]*>,b1,0
+10000004:[ \t]+00bf0162[ \t]+addkpc \.S2 100000fc <[^>]*>,b1,0
+10000008:[ \t]+08000012[ \t]+b \.S2 fc00000 <[^>]*>
+1000000c:[ \t]+07ffff92[ \t]+b \.S2 103ffffc <[^>]*>
+10000010:[ \t]+00c01022[ \t]+bdec \.S2 ffff800 <[^>]*>,b1
+10000014:[ \t]+00bff022[ \t]+bdec \.S2 100007fc <[^>]*>,b1
+10000018:[ \t]+08000122[ \t]+bnop \.S2 fffe000 <[^>]*>,0
+1000001c:[ \t]+07ff0122[ \t]+bnop \.S2 10001ffc <[^>]*>,0
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-global.s b/ld/testsuite/ld-tic6x/pcrel-reloc-global.s
new file mode 100644
index 0000000..b5fbf2a
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-global.s
@@ -0,0 +1,18 @@
+.globl s7a
+.globl s7b
+.globl s21a
+.globl s21b
+.globl s10a
+.globl s10b
+.globl s12a
+.globl s12b
+.text
+.nocmp
+	addkpc .S2 s7a,b1,0
+	addkpc .S2 s7b,b1,0
+	b .S2 s21a
+	b .S2 s21b
+	bdec .S2 s10a,b1
+	bdec .S2 s10b,b1
+	bnop .S2 s12a,0
+	bnop .S2 s12b,0
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-1.s b/ld/testsuite/ld-tic6x/pcrel-reloc-local-1.s
new file mode 100644
index 0000000..5a750e7
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-1.s
@@ -0,0 +1,16 @@
+.text
+.nocmp
+	nop
+	addkpc .S2 f1,b1,0
+	addkpc .S2 f2,b1,0
+	b .S2 f1
+	b .S2 f2
+	bdec .S2 f1,b1
+	bdec .S2 f2,b1
+	bnop .S2 f1,0
+	bnop .S2 f2,0
+.section .text.1,"ax",@progbits
+f1:
+	nop
+f2:
+	nop
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-2.s b/ld/testsuite/ld-tic6x/pcrel-reloc-local-2.s
new file mode 100644
index 0000000..287165f
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-2.s
@@ -0,0 +1,16 @@
+.text
+.nocmp
+	nop
+	bnop .S2 f3,0
+	bnop .S2 f4,0
+	bdec .S2 f3,b1
+	bdec .S2 f4,b1
+	b .S2 f3
+	b .S2 f4
+	addkpc .S2 f3,b1,0
+	addkpc .S2 f4,b1,0
+.section .text.1,"ax",@progbits
+f3:
+	nop
+f4:
+	nop
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-r.d b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r.d
new file mode 100644
index 0000000..fa54742
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r.d
@@ -0,0 +1,62 @@
+#name: C6X PC-relative relocations, local symbols, -r
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: pcrel-reloc-local-1.s
+#source: pcrel-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00000000[ \t]+nop 1
+[ \t]*4:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0
+[ \t]*4: R_C6000_PCR_S7[ \t]+\.text\.1
+[ \t]*8:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0
+[ \t]*8: R_C6000_PCR_S7[ \t]+\.text\.1\+0x4
+[ \t]*c:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*>
+[ \t]*c: R_C6000_PCR_S21[ \t]+\.text\.1
+[ \t]*10:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*>
+[ \t]*10: R_C6000_PCR_S21[ \t]+\.text\.1\+0x4
+[ \t]*14:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1
+[ \t]*14: R_C6000_PCR_S10[ \t]+\.text\.1
+[ \t]*18:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1
+[ \t]*18: R_C6000_PCR_S10[ \t]+\.text\.1\+0x4
+[ \t]*1c:[ \t]+00000122[ \t]+bnop \.S2 0 <[^>]*>,0
+[ \t]*1c: R_C6000_PCR_S12[ \t]+\.text\.1
+[ \t]*20:[ \t]+00000122[ \t]+bnop \.S2 20 <[^>]*>,0
+[ \t]*20: R_C6000_PCR_S12[ \t]+\.text\.1\+0x4
+[ \t]*\.\.\.
+[ \t]*44:[ \t]+00000122[ \t]+bnop \.S2 40 <[^>]*>,0
+[ \t]*44: R_C6000_PCR_S12[ \t]+\.text\.1\+0x20
+[ \t]*48:[ \t]+00000122[ \t]+bnop \.S2 40 <[^>]*>,0
+[ \t]*48: R_C6000_PCR_S12[ \t]+\.text\.1\+0x24
+[ \t]*4c:[ \t]+00801022[ \t]+bdec \.S2 40 <[^>]*>,b1
+[ \t]*4c: R_C6000_PCR_S10[ \t]+\.text\.1\+0x20
+[ \t]*50:[ \t]+00801022[ \t]+bdec \.S2 40 <[^>]*>,b1
+[ \t]*50: R_C6000_PCR_S10[ \t]+\.text\.1\+0x24
+[ \t]*54:[ \t]+00000012[ \t]+b \.S2 40 <[^>]*>
+[ \t]*54: R_C6000_PCR_S21[ \t]+\.text\.1\+0x20
+[ \t]*58:[ \t]+00000012[ \t]+b \.S2 40 <[^>]*>
+[ \t]*58: R_C6000_PCR_S21[ \t]+\.text\.1\+0x24
+[ \t]*5c:[ \t]+00800162[ \t]+addkpc \.S2 40 <[^>]*>,b1,0
+[ \t]*5c: R_C6000_PCR_S7[ \t]+\.text\.1\+0x20
+[ \t]*60:[ \t]+00800162[ \t]+addkpc \.S2 60 <[^>]*>,b1,0
+[ \t]*60: R_C6000_PCR_S7[ \t]+\.text\.1\+0x24
+[ \t]*\.\.\.
+
+Disassembly of section \.text\.1:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00000000[ \t]+nop 1
+
+0+4 <[^>]*>:
+[ \t]*\.\.\.
+
+0+20 <[^>]*>:
+[ \t]*20:[ \t]+00000000[ \t]+nop 1
+
+0+24 <[^>]*>:
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local.d b/ld/testsuite/ld-tic6x/pcrel-reloc-local.d
new file mode 100644
index 0000000..b7cd444
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local.d
@@ -0,0 +1,44 @@
+#name: C6X PC-relative relocations, local symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: pcrel-reloc-local-1.s
+#source: pcrel-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00000000[ \t]+nop 1
+10000004:[ \t]+00900162[ \t]+addkpc \.S2 10000040 <[^>]*>,b1,0
+10000008:[ \t]+00910162[ \t]+addkpc \.S2 10000044 <[^>]*>,b1,0
+1000000c:[ \t]+00000812[ \t]+b \.S2 10000040 <[^>]*>
+10000010:[ \t]+00000892[ \t]+b \.S2 10000044 <[^>]*>
+10000014:[ \t]+00821022[ \t]+bdec \.S2 10000040 <[^>]*>,b1
+10000018:[ \t]+00823022[ \t]+bdec \.S2 10000044 <[^>]*>,b1
+1000001c:[ \t]+00100122[ \t]+bnop \.S2 10000040 <[^>]*>,0
+10000020:[ \t]+00090122[ \t]+bnop \.S2 10000044 <[^>]*>,0
+[ \t]*\.\.\.
+
+10000040 <[^>]*>:
+10000040:[ \t]+00000000[ \t]+nop 1
+
+10000044 <[^>]*>:
+[ \t]*\.\.\.
+10000064:[ \t]+00100122[ \t]+bnop \.S2 100000a0 <[^>]*>,0
+10000068:[ \t]+00110122[ \t]+bnop \.S2 100000a4 <[^>]*>,0
+1000006c:[ \t]+00821022[ \t]+bdec \.S2 100000a0 <[^>]*>,b1
+10000070:[ \t]+00823022[ \t]+bdec \.S2 100000a4 <[^>]*>,b1
+10000074:[ \t]+00000812[ \t]+b \.S2 100000a0 <[^>]*>
+10000078:[ \t]+00000892[ \t]+b \.S2 100000a4 <[^>]*>
+1000007c:[ \t]+00900162[ \t]+addkpc \.S2 100000a0 <[^>]*>,b1,0
+10000080:[ \t]+00890162[ \t]+addkpc \.S2 100000a4 <[^>]*>,b1,0
+[ \t]*\.\.\.
+
+100000a0 <[^>]*>:
+100000a0:[ \t]+00000000[ \t]+nop 1
+
+100000a4 <[^>]*>:
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-1.d
new file mode 100644
index 0000000..6046491
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, ABS_S16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x8000
+#source: reloc-overflow-abs-s16.s
+#error: .*relocation truncated to fit: R_C6000_ABS_S16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-2.d
new file mode 100644
index 0000000..1119665
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, ABS_S16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0xffff7fff
+#source: reloc-overflow-abs-s16.s
+#error: .*relocation truncated to fit: R_C6000_ABS_S16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16.s b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16.s
new file mode 100644
index 0000000..023d7b2
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs-s16.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	mvk .S1 s,a1
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs16-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs16-1.d
new file mode 100644
index 0000000..5344944
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs16-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, ABS16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x10000
+#source: reloc-overflow-abs16.s
+#error: .*relocation truncated to fit: R_C6000_ABS16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs16-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs16-2.d
new file mode 100644
index 0000000..9b858a8
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs16-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, ABS16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0xffff7fff
+#source: reloc-overflow-abs16.s
+#error: .*relocation truncated to fit: R_C6000_ABS16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs16.s b/ld/testsuite/ld-tic6x/reloc-overflow-abs16.s
new file mode 100644
index 0000000..a8c2200
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs16.s
@@ -0,0 +1,3 @@
+.globl s
+.data
+	.short s
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs8-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs8-1.d
new file mode 100644
index 0000000..1bb87fc
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs8-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, ABS8
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x100
+#source: reloc-overflow-abs8.s
+#error: .*relocation truncated to fit: R_C6000_ABS8.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs8-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-abs8-2.d
new file mode 100644
index 0000000..85df882
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs8-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, ABS8
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0xffffff7f
+#source: reloc-overflow-abs8.s
+#error: .*relocation truncated to fit: R_C6000_ABS8.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-abs8.s b/ld/testsuite/ld-tic6x/reloc-overflow-abs8.s
new file mode 100644
index 0000000..e08a65e
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-abs8.s
@@ -0,0 +1,3 @@
+.globl s
+.data
+	.byte s
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-1.d
new file mode 100644
index 0000000..a19131c
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, PCR_S10
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x10000800
+#source: reloc-overflow-pcr-s10.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S10.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-2.d
new file mode 100644
index 0000000..7ca26fb
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, PCR_S10
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x0ffff7fc
+#source: reloc-overflow-pcr-s10.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S10.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10.s b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10.s
new file mode 100644
index 0000000..302eef0
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s10.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	bdec .S2 s,b1
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-1.d
new file mode 100644
index 0000000..60e8717
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, PCR_S12
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x10002000
+#source: reloc-overflow-pcr-s12.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S12.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-2.d
new file mode 100644
index 0000000..6a90764
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, PCR_S12
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x0fffdffc
+#source: reloc-overflow-pcr-s12.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S12.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12.s b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12.s
new file mode 100644
index 0000000..ea7946d
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s12.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	bnop .S2 s,0
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-1.d
new file mode 100644
index 0000000..4b8ca82
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, PCR_S21
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x10400000
+#source: reloc-overflow-pcr-s21.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S21.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-2.d
new file mode 100644
index 0000000..1339b7b
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, PCR_S21
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x0fbffffc
+#source: reloc-overflow-pcr-s21.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S21.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21.s b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21.s
new file mode 100644
index 0000000..c902884
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s21.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	b .S2 s
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-1.d
new file mode 100644
index 0000000..f4391ff
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, PCR_S7
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x10000100
+#source: reloc-overflow-pcr-s7.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S7.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-2.d
new file mode 100644
index 0000000..e0db0f1
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, PCR_S7
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s=0x0ffffefc
+#source: reloc-overflow-pcr-s7.s
+#error: .*relocation truncated to fit: R_C6000_PCR_S7.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7.s b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7.s
new file mode 100644
index 0000000..58df0c6
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-pcr-s7.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	addkpc .S2 s,b1,0
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-1.d
new file mode 100644
index 0000000..2712e90
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, SBR_S16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x8080
+#source: reloc-overflow-sbr-s16.s
+#error: .*relocation truncated to fit: R_C6000_SBR_S16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-2.d
new file mode 100644
index 0000000..144e414
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, SBR_S16
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0xffff807f
+#source: reloc-overflow-sbr-s16.s
+#error: .*relocation truncated to fit: R_C6000_SBR_S16.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16.s b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16.s
new file mode 100644
index 0000000..d208c8c
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-s16.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	mvk .S1 $dpr_byte(s),a1
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-1.d
new file mode 100644
index 0000000..d21ab5f
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, SBR_U15_B
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x8080
+#source: reloc-overflow-sbr-u15-b.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_B.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-2.d
new file mode 100644
index 0000000..f3b48b6
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, SBR_U15_B
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x7f
+#source: reloc-overflow-sbr-u15-b.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_B.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b.s b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b.s
new file mode 100644
index 0000000..8fcd019
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-b.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	ldb .D2T2 *+b14(s),b1
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-1.d
new file mode 100644
index 0000000..178b781
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, SBR_U15_H
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x10080
+#source: reloc-overflow-sbr-u15-h.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_H.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-2.d
new file mode 100644
index 0000000..914ec48
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, SBR_U15_H
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x7e
+#source: reloc-overflow-sbr-u15-h.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_H.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h.s b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h.s
new file mode 100644
index 0000000..ed54caa
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-h.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	ldh .D2T2 *+b14(s),b1
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-1.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-1.d
new file mode 100644
index 0000000..e152f85
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-1.d
@@ -0,0 +1,5 @@
+#name: C6X relocation overflow, SBR_U15_W
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x20080
+#source: reloc-overflow-sbr-u15-w.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_W.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-2.d b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-2.d
new file mode 100644
index 0000000..995bee2
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w-2.d
@@ -0,0 +1,5 @@
+#name: C6X relocation underflow, SBR_U15_W
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym s=0x7c
+#source: reloc-overflow-sbr-u15-w.s
+#error: .*relocation truncated to fit: R_C6000_SBR_U15_W.*
diff --git a/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w.s b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w.s
new file mode 100644
index 0000000..1f6208c
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/reloc-overflow-sbr-u15-w.s
@@ -0,0 +1,3 @@
+.text
+.nocmp
+	ldw .D2T2 *+b14(s),b1
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-global.d b/ld/testsuite/ld-tic6x/sbr-reloc-global.d
new file mode 100644
index 0000000..92bf89c
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-global.d
@@ -0,0 +1,27 @@
+#name: C6X SB-relative relocations, global symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym sw1=0x80 --defsym sw2=0x2007c --defsym sh1=0x80 --defsym sh2=0x1007e --defsym sb1=0x80 --defsym sb2=0x807f --defsym sb16a=0xffff8080 --defsym sb16b=0x807f --defsym sbw=0x123456f8 --defsym shw=0x2468ad70 --defsym sww=0x48d15a60
+#source: sbr-reloc-global.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+10000004:[ \t]+00ffff6e[ \t]+ldw \.D2T2 \*\+b14\(131068\),b1
+10000008:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+1000000c:[ \t]+00ffff4e[ \t]+ldh \.D2T2 \*\+b14\(65534\),b1
+10000010:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+10000014:[ \t]+00ffff2e[ \t]+ldb \.D2T2 \*\+b14\(32767\),b1
+10000018:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+1000001c:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
+10000020:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+10000024:[ \t]+00891a68[ \t]+mvkh \.S1 305397760,a1
+10000028:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+1000002c:[ \t]+00891a68[ \t]+mvkh \.S1 305397760,a1
+10000030:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+10000034:[ \t]+00891a68[ \t]+mvkh \.S1 305397760,a1
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-global.s b/ld/testsuite/ld-tic6x/sbr-reloc-global.s
new file mode 100644
index 0000000..12edd08
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-global.s
@@ -0,0 +1,27 @@
+.globl sw1
+.globl sw2
+.globl sh1
+.globl sh2
+.globl sb1
+.globl sb2
+.globl sb16a
+.globl sb16b
+.globl sbw
+.globl shw
+.globl sww
+.text
+.nocmp
+	ldw .D2T2 *+b14(sw1),b1
+	ldw .D2T2 *+b14(sw2),b1
+	ldh .D2T2 *+b14(sh1),b1
+	ldh .D2T2 *+b14(sh2),b1
+	ldb .D2T2 *+b14(sb1),b1
+	ldb .D2T2 *+b14(sb2),b1
+	mvk .S1 $dpr_byte(sb16a),a1
+	mvk .S1 $dpr_byte(sb16b),a1
+	mvkl .S1 $dpr_byte(sbw),a1
+	mvkh .S1 $dpr_byte(sbw),a1
+	mvkl .S1 $dpr_hword(shw),a1
+	mvkh .S1 $dpr_hword(shw),a1
+	mvkl .S1 $dpr_word(sww),a1
+	mvkh .S1 $dpr_word(sww),a1
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-1.s b/ld/testsuite/ld-tic6x/sbr-reloc-local-1.s
new file mode 100644
index 0000000..25bb75c
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-1.s
@@ -0,0 +1,24 @@
+.text
+.nocmp
+	ldw .D2T2 *+b14(a),b1
+	ldw .D2T2 *+b14(b),b1
+	ldh .D2T2 *+b14(b),b1
+	ldh .D2T2 *+b14(c),b1
+	ldb .D2T2 *+b14(c),b1
+	ldb .D2T2 *+b14(d),b1
+	mvk .S1 $dpr_byte(d),a1
+	mvkl .S1 $dpr_byte(c),a1
+	mvkh .S1 $dpr_byte(d),a1
+	mvkl .S1 $dpr_hword(b),a1
+	mvkh .S1 $dpr_hword(c),a1
+	mvkl .S1 $dpr_word(a),a1
+	mvkh .S1 $dpr_word(b),a1
+.data
+a:
+	.word 0
+b:
+	.short 0
+c:
+	.byte 0
+d:
+	.byte 0
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-2.s b/ld/testsuite/ld-tic6x/sbr-reloc-local-2.s
new file mode 100644
index 0000000..2ced424
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-2.s
@@ -0,0 +1,24 @@
+.text
+.nocmp
+	ldw .D2T2 *+b14(e),b1
+	ldw .D2T2 *+b14(f),b1
+	ldh .D2T2 *+b14(f),b1
+	ldh .D2T2 *+b14(g),b1
+	ldb .D2T2 *+b14(g),b1
+	ldb .D2T2 *+b14(h),b1
+	mvk .S1 $dpr_byte(h),a1
+	mvkl .S1 $dpr_byte(g),a1
+	mvkh .S1 $dpr_byte(h),a1
+	mvkl .S1 $dpr_hword(f),a1
+	mvkh .S1 $dpr_hword(g),a1
+	mvkl .S1 $dpr_word(e),a1
+	mvkh .S1 $dpr_word(f),a1
+.data
+e:
+	.word 0
+f:
+	.short 0
+g:
+	.byte 0
+h:
+	.byte 0
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-r.d b/ld/testsuite/ld-tic6x/sbr-reloc-local-r.d
new file mode 100644
index 0000000..fdb2e14
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-r.d
@@ -0,0 +1,67 @@
+#name: C6X SB-relative relocations, local symbols, -r
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: sbr-reloc-local-1.s
+#source: sbr-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+[ \t]*0: R_C6000_SBR_U15_W[ \t]+\.data
+[ \t]*4:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+[ \t]*4: R_C6000_SBR_U15_W[ \t]+\.data\+0x4
+[ \t]*8:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+[ \t]*8: R_C6000_SBR_U15_H[ \t]+\.data\+0x4
+[ \t]*c:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+[ \t]*c: R_C6000_SBR_U15_H[ \t]+\.data\+0x6
+[ \t]*10:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+[ \t]*10: R_C6000_SBR_U15_B[ \t]+\.data\+0x6
+[ \t]*14:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+[ \t]*14: R_C6000_SBR_U15_B[ \t]+\.data\+0x7
+[ \t]*18:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*18: R_C6000_SBR_S16[ \t]+\.data\+0x7
+[ \t]*1c:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*1c: R_C6000_SBR_L16_B[ \t]+\.data\+0x6
+[ \t]*20:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*20: R_C6000_SBR_H16_B[ \t]+\.data\+0x7
+[ \t]*24:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*24: R_C6000_SBR_L16_H[ \t]+\.data\+0x4
+[ \t]*28:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*28: R_C6000_SBR_H16_H[ \t]+\.data\+0x6
+[ \t]*2c:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*2c: R_C6000_SBR_L16_W[ \t]+\.data
+[ \t]*30:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*30: R_C6000_SBR_H16_W[ \t]+\.data\+0x4
+[ \t]*\.\.\.
+[ \t]*40:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+[ \t]*40: R_C6000_SBR_U15_W[ \t]+\.data\+0x8
+[ \t]*44:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+[ \t]*44: R_C6000_SBR_U15_W[ \t]+\.data\+0xc
+[ \t]*48:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+[ \t]*48: R_C6000_SBR_U15_H[ \t]+\.data\+0xc
+[ \t]*4c:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+[ \t]*4c: R_C6000_SBR_U15_H[ \t]+\.data\+0xe
+[ \t]*50:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+[ \t]*50: R_C6000_SBR_U15_B[ \t]+\.data\+0xe
+[ \t]*54:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+[ \t]*54: R_C6000_SBR_U15_B[ \t]+\.data\+0xf
+[ \t]*58:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*58: R_C6000_SBR_S16[ \t]+\.data\+0xf
+[ \t]*5c:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*5c: R_C6000_SBR_L16_B[ \t]+\.data\+0xe
+[ \t]*60:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*60: R_C6000_SBR_H16_B[ \t]+\.data\+0xf
+[ \t]*64:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*64: R_C6000_SBR_L16_H[ \t]+\.data\+0xc
+[ \t]*68:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*68: R_C6000_SBR_H16_H[ \t]+\.data\+0xe
+[ \t]*6c:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*6c: R_C6000_SBR_L16_W[ \t]+\.data\+0x8
+[ \t]*70:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*70: R_C6000_SBR_H16_W[ \t]+\.data\+0xc
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local.d b/ld/testsuite/ld-tic6x/sbr-reloc-local.d
new file mode 100644
index 0000000..0db2c24
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local.d
@@ -0,0 +1,41 @@
+#name: C6X SB-relative relocations, local symbols
+#as: -mlittle-endian
+#ld: -melf32_tic6x_le -Tsbr.ld
+#source: sbr-reloc-local-1.s
+#source: sbr-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+10000004:[ \t]+0080016e[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
+10000008:[ \t]+0080024e[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
+1000000c:[ \t]+0080034e[ \t]+ldh \.D2T2 \*\+b14\(6\),b1
+10000010:[ \t]+0080062e[ \t]+ldb \.D2T2 \*\+b14\(6\),b1
+10000014:[ \t]+0080072e[ \t]+ldb \.D2T2 \*\+b14\(7\),b1
+10000018:[ \t]+008003a8[ \t]+mvk \.S1 7,a1
+1000001c:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+10000020:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+10000024:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+10000028:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+1000002c:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+10000030:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*\.\.\.
+10000040:[ \t]+0080026e[ \t]+ldw \.D2T2 \*\+b14\(8\),b1
+10000044:[ \t]+0080036e[ \t]+ldw \.D2T2 \*\+b14\(12\),b1
+10000048:[ \t]+0080064e[ \t]+ldh \.D2T2 \*\+b14\(12\),b1
+1000004c:[ \t]+0080074e[ \t]+ldh \.D2T2 \*\+b14\(14\),b1
+10000050:[ \t]+00800e2e[ \t]+ldb \.D2T2 \*\+b14\(14\),b1
+10000054:[ \t]+00800f2e[ \t]+ldb \.D2T2 \*\+b14\(15\),b1
+10000058:[ \t]+008007a8[ \t]+mvk \.S1 15,a1
+1000005c:[ \t]+00800728[ \t]+mvk \.S1 14,a1
+10000060:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+10000064:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+10000068:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+1000006c:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+10000070:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr.ld b/ld/testsuite/ld-tic6x/sbr.ld
new file mode 100644
index 0000000..909f589
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr.ld
@@ -0,0 +1,9 @@
+EXTERN (__c6xabi_DSBT_BASE);
+SECTIONS
+{
+  . = 0x80;
+  .data : { PROVIDE_HIDDEN (__c6xabi_DSBT_BASE = .); *(.data*) }
+  . = 0x10000000;
+  .text : { *(.text*) }
+  /DISCARD/ : { *(*) }
+}
diff --git a/ld/testsuite/ld-tic6x/tic6x.exp b/ld/testsuite/ld-tic6x/tic6x.exp
new file mode 100644
index 0000000..3108a09
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/tic6x.exp
@@ -0,0 +1,7 @@
+if { [istarget tic6x-*-*] } {
+    foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] {
+	if { [runtest_file_p $runtests $test] } {
+	    run_dump_test [file rootname $test]
+	}
+    }
+}