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authorNelson Chu <nelson@rivosinc.com>2023-03-25 08:41:12 +0800
committerNelson Chu <nelson@rivosinc.com>2023-03-30 07:40:14 +0800
commitb679fb488a8c35e573d50f118a09f72c1f6289de (patch)
tree523872417472d0d54487e0ca668b3260c2b391ca /ld
parent23068b02d3a6743658110c7662178fdebbe2ac6a (diff)
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RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol.
There are two improvements, which are all referenced to aarch64, * R_RISCV_32 with non ABS symbol cannot be used under RV64 when making shard objects. * Don't need dynamic relocation for R_RISCV_32/64 under RV32/RV64 when making shared objects, if the referenced symbol is local ABS symbol. However, considering this link, https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/341 Seems like we should makes all R_RISCV_32/64 relocs with ABS symbol that don't need any dynamic relocations when making the shared objects. But anyway, I just sync the current behavior as aarch64 ld, in case there are any unexpected behaviors happen. Passed the gcc/binutils regressions in riscv-gnu-toolchain. bfd/ * elfnn-riscv.c (riscv_elf_check_relocs): Only allow R_RISCV_32 with ABS symbol under RV64. (riscv_elf_relocate_section): R_RISCV_32/64 with local ABS symbol under RV32/RV64 doesn't need any dynamic relocation when making shared objects. I just make the implementations similar to other targets, so that will be more easy to mainatain. ld/ * testsuite/ld-riscv-elf/data-reloc*: New testcases. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Added new data-reloc* testcases, and need to make ifunc-seperate* testcases work for rv32. * testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s: Likewise.
Diffstat (limited to 'ld')
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d21
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d18
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d21
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d13
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d4
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d21
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d21
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d21
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d4
-rw-r--r--ld/testsuite/ld-riscv-elf/data-reloc.s22
-rw-r--r--ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s2
-rw-r--r--ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s2
-rw-r--r--ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp15
13 files changed, 183 insertions, 2 deletions
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d
new file mode 100644
index 0000000..13f34e0
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d
@@ -0,0 +1,21 @@
+#source: data-reloc.s
+#as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ 8000: 00000000 .word 0x00000000
+ 8000: R_RISCV_32 addr_globl
+
+0+8004 <addr_local>:
+ ...
+ 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004
+ 8008: R_RISCV_32 abs
+ 800c: 00000200 .word 0x00000200
+ 8010: 00000000 .word 0x00000000
+ 8010: R_RISCV_32 undef
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d
new file mode 100644
index 0000000..1e8f35a
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d
@@ -0,0 +1,18 @@
+#source: data-reloc.s
+#as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ 8000: 00000000 .word 0x00000000
+ 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000
+
+0+8004 <addr_local>:
+ 8004: 00000000 .word 0x00000000
+ 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004
+ 8008: 00000100 .word 0x00000100
+ 800c: 00000200 .word 0x00000200
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d
new file mode 100644
index 0000000..5c947e2
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d
@@ -0,0 +1,21 @@
+#source: data-reloc.s
+#as: -march=rv32i -mabi=ilp32 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ 8000: 00000000 .word 0x00000000
+ 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000
+
+0+8004 <addr_local>:
+ ...
+ 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004
+ 8008: R_RISCV_RELATIVE \*ABS\*\+0x100
+ 800c: 00000200 .word 0x00000200
+ 8010: 00000000 .word 0x00000000
+ 8010: R_RISCV_32 undef
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d
new file mode 100644
index 0000000..1d3686d
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d
@@ -0,0 +1,13 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __abs__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <.text>:
+ 8000: 00000100 .word 0x00000100
+ 8004: 00000200 .word 0x00000200
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d
new file mode 100644
index 0000000..39b50e3
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d
@@ -0,0 +1,4 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __addr__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 -shared
+#error: .*relocation R_RISCV_32 against non-absolute symbol `addr_globl' can not be used in RV64 when making a shared object.*
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d
new file mode 100644
index 0000000..dab0ccc
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d
@@ -0,0 +1,21 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ ...
+ 8000: R_RISCV_64 addr_globl
+
+0+8008 <addr_local>:
+ ...
+ 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008
+ 8010: R_RISCV_64 abs
+ 8018: 00000200 .word 0x00000200
+ ...
+ 8020: R_RISCV_64 undef
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d
new file mode 100644
index 0000000..fd6c470
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d
@@ -0,0 +1,21 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -pie
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ ...
+ 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000
+
+0+8008 <addr_local>:
+ ...
+ 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008
+ 8010: 00000100 .word 0x00000100
+ 8014: 00000000 .word 0x00000000
+ 8018: 00000200 .word 0x00000200
+ 801c: 00000000 .word 0x00000000
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d
new file mode 100644
index 0000000..5d41f86
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d
@@ -0,0 +1,21 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __64_bit__=1 -defsym __abs__=1 -defsym __addr__=1 -defsym __undef__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 --defsym abs=0x100 --defsym abs_local=0x200 -shared -Bsymbolic
+#objdump: -dR
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+8000 <addr_globl>:
+ ...
+ 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000
+
+0+8008 <addr_local>:
+ ...
+ 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008
+ 8010: R_RISCV_RELATIVE \*ABS\*\+0x100
+ 8018: 00000200 .word 0x00000200
+ ...
+ 8020: R_RISCV_64 undef
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d
new file mode 100644
index 0000000..e5de484
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d
@@ -0,0 +1,4 @@
+#source: data-reloc.s
+#as: -march=rv64i -mabi=lp64 -defsym __undef__=1
+#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=0x0 -shared
+#error: .*relocation R_RISCV_32 against non-absolute symbol `undef' can not be used in RV64 when making a shared object.*
diff --git a/ld/testsuite/ld-riscv-elf/data-reloc.s b/ld/testsuite/ld-riscv-elf/data-reloc.s
new file mode 100644
index 0000000..3715150
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/data-reloc.s
@@ -0,0 +1,22 @@
+ .macro DATA symbol
+.ifdef __64_bit__
+ .quad \symbol
+.else
+ .word \symbol
+.endif
+ .endm
+.ifdef __addr__
+ .globl addr_globl
+addr_globl:
+ DATA addr_globl
+addr_local:
+ DATA addr_local
+.endif
+.ifdef __abs__
+ .hidden abs_local
+ DATA abs
+ DATA abs_local
+.endif
+.ifdef __undef__
+ DATA undef
+.endif
diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s
index 23c7254..df0d33b 100644
--- a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s
+++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s
@@ -20,4 +20,4 @@ main:
.data
foo_addr:
- .long foo
+ .quad foo
diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s
index 8aa6403..cc1608a 100644
--- a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s
+++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s
@@ -23,4 +23,4 @@ main:
.data
foo_addr:
- .long foo
+ .quad foo
diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index 5dd6144..1b2a5ce 100644
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -217,6 +217,16 @@ if [istarget "riscv*-*-*"] {
run_dump_test "shared-lib-nopic-03"
run_dump_test "shared-lib-nopic-04"
+ run_dump_test "data-reloc-rv64-pic"
+ run_dump_test "data-reloc-rv64-pie"
+ run_dump_test "data-reloc-rv64-symbolic"
+ run_dump_test "data-reloc-rv32-pic"
+ run_dump_test "data-reloc-rv32-pie"
+ run_dump_test "data-reloc-rv32-symbolic"
+ run_dump_test "data-reloc-rv64-abs32-pic"
+ run_dump_test "data-reloc-rv64-addr32-pic"
+ run_dump_test "data-reloc-rv64-undef32-pic"
+
# IFUNC testcases.
# Check IFUNC by single type relocs.
run_dump_test_ifunc "ifunc-reloc-call-01" rv32 exe
@@ -270,6 +280,11 @@ if [istarget "riscv*-*-*"] {
run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pie
run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pic
+ # TODO: Make the following tests work under RV32.
+ if [istarget "riscv32-*-*"] {
+ return
+ }
+
# Setup shared libraries.
run_ld_link_tests {
{ "Build shared library for IFUNC non-PLT caller"