diff options
author | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2015-01-16 12:19:21 +0100 |
---|---|---|
committer | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2015-01-16 12:28:58 +0100 |
commit | 1e2e8c529c1cf4fcc8cbae382aa0a653d0b65da6 (patch) | |
tree | 2cc295f864977f3b461a8f8fa80af608dcb8a769 /ld | |
parent | 9f2850baa3ce341f0ba42bd9519cb3c1bf1287c7 (diff) | |
download | gdb-1e2e8c529c1cf4fcc8cbae382aa0a653d0b65da6.zip gdb-1e2e8c529c1cf4fcc8cbae382aa0a653d0b65da6.tar.gz gdb-1e2e8c529c1cf4fcc8cbae382aa0a653d0b65da6.tar.bz2 |
S/390: Add support for IBM z13.
- 32 128 bit vector registers (overlapping with the existing 16 64 bit
floating point registers)
- vector double instructions
- vector integer instructions
- scalar vector instructions (allowing to have more floating point
registers for scalar operations)
- vector string instructions
gas/ChangeLog:
* config/tc-s390.c (struct pd_reg): Remove.
(pre_defined_registers): Remove.
(REG_NAME_CNT): Remove.
(reg_name_search): Calculate the register number instead of doing
a lookup.
(register_name, tc_s390_regname_to_dw2regnum): Adopt to the new
reg_name_search signature.
(s390_parse_cpu): Support the new arch string z13.
(s390_insert_operand): Support for vector registers with the extra
field for the fifth bit of each vector register operand.
(md_gather_operand): Adjust to the new handling of optional
parameters.
* doc/as.texinfo: Document the z13 cpu string.
gas/testsuite/ChangeLog:
* gas/s390/esa-g5.d: Add a variant without the optional operand.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z9-109.d: Likewise.
* gas/s390/esa-z9-109.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z10.d: For variants with a zero optional argument
it is not dumped by objdump anymore.
* gas/s390/zarch-zEC12.d: Likewise.
* gas/s390/zarch-z13.d: New file.
* gas/s390/zarch-z13.s: New file.
* gas/s390/s390.exp: Run the test for the z13 files.
include/opcode/ChangeLog:
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.
ld/testsuite/ChangeLog:
* ld-s390/tlsbin.dd: The nopr register operand is optional and not
printed if 0 anymore.
opcodes/ChangeLog:
* s390-dis.c (s390_extract_operand): Support vector register
operands.
(s390_print_insn_with_opcode): Support new operands types and add
new handling of optional operands.
* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
and include opcode/s390.h instead.
(struct op_struct): New field `flags'.
(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
(dumpTable): Dump flags.
(main): Parse flags from the s390-opc.txt file. Add z13 as cpu
string.
* s390-opc.c: Add new operands types, instruction formats, and
instruction masks.
(s390_opformats): Add new formats for .insn.
* s390-opc.txt: Add new instructions.
Diffstat (limited to 'ld')
-rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | ld/testsuite/ld-s390/tlsbin.dd | 12 |
2 files changed, 11 insertions, 6 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 58e5595..4f59af8 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * ld-s390/tlsbin.dd: The nopr register operand is optional and not + printed if 0 anymore. + 2015-01-15 H.J. Lu <hongjiu.lu@intel.com> PR ld/17847 diff --git a/ld/testsuite/ld-s390/tlsbin.dd b/ld/testsuite/ld-s390/tlsbin.dd index 0e824da..c1dbd07 100644 --- a/ld/testsuite/ld-s390/tlsbin.dd +++ b/ld/testsuite/ld-s390/tlsbin.dd @@ -109,17 +109,17 @@ Disassembly of section .text: # IE -> LE against global var defined in exec +[0-9a-f]+: 58 30 d0 38 l %r3,56\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # IE -> LE against local var +[0-9a-f]+: 58 30 d0 3c l %r3,60\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # IE -> LE against hidden var +[0-9a-f]+: 58 30 d0 40 l %r3,64\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # IE against global var with small got access (no optimization) +[0-9a-f]+: 58 30 c0 14 l %r3,20\(%r12\) @@ -173,17 +173,17 @@ Disassembly of section .text: # IE -> LE against global var defined in exec +[0-9a-f]+: 58 30 d0 04 l %r3,4\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # IE -> LE against local var +[0-9a-f]+: 58 30 d0 08 l %r3,8\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # IE -> LE against hidden but not local var +[0-9a-f]+: 58 30 d0 0c l %r3,12\(%r13\) +[0-9a-f]+: 18 43 lr %r4,%r3 - +[0-9a-f]+: 07 00 nopr %r0 + +[0-9a-f]+: 07 00 nopr +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) # LE, global var defined in exec +[0-9a-f]+: 58 40 d0 10 l %r4,16\(%r13\) |