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author | Lulu Cai <cailulu@loongson.cn> | 2024-03-07 11:09:14 +0800 |
---|---|---|
committer | liuzhensong <liuzhensong@loongson.cn> | 2024-03-12 17:37:12 +0800 |
commit | d8915f27ebb5a794c8ebbebe8ebf1374e2acf629 (patch) | |
tree | 808f43f4bd36baaaac964e31bdc83995eef929fd /ld/testsuite | |
parent | d404349e5f9a55cbfffff86b6c97e3b5308269d1 (diff) | |
download | gdb-d8915f27ebb5a794c8ebbebe8ebf1374e2acf629.zip gdb-d8915f27ebb5a794c8ebbebe8ebf1374e2acf629.tar.gz gdb-d8915f27ebb5a794c8ebbebe8ebf1374e2acf629.tar.bz2 |
LoongArch: Fix gas and ld test cases
* After adding the old LE relax, all old LE relocations will have
an R_LARCH_RELAX relocation. Fix the gas test case failure caused
by the implementation of the old LE relax.
* loongarch64-elf does not support pie and -z norelro options,
removed in test files.
Diffstat (limited to 'ld/testsuite')
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/desc-le-norelax.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/desc-le-relax.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/ie-le-norelax.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/ie-le-relax.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 5 | ||||
-rw-r--r-- | ld/testsuite/ld-loongarch-elf/macro_op_32.d | 4 |
6 files changed, 12 insertions, 5 deletions
diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d index 5a53245..43749f1 100644 --- a/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d +++ b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d @@ -1,5 +1,5 @@ #as: -#ld: -z norelro -e0 --no-relax +#ld: -e0 --no-relax #objdump: -dr #skip: loongarch32-*-* diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-relax.d b/ld/testsuite/ld-loongarch-elf/desc-le-relax.d index 03b5535..71a540f 100644 --- a/ld/testsuite/ld-loongarch-elf/desc-le-relax.d +++ b/ld/testsuite/ld-loongarch-elf/desc-le-relax.d @@ -1,5 +1,5 @@ #as: -#ld: -z norelro -e0 +#ld: -e0 #objdump: -dr -M no-aliases #skip: loongarch32-*-* diff --git a/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d index 81d78ca..0221b49 100644 --- a/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d +++ b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d @@ -1,5 +1,5 @@ #as: -#ld: -z norelro -e0 --no-relax +#ld: -e0 --no-relax #objdump: -dr #skip: loongarch32-*-* diff --git a/ld/testsuite/ld-loongarch-elf/ie-le-relax.d b/ld/testsuite/ld-loongarch-elf/ie-le-relax.d index 03b5535..71a540f 100644 --- a/ld/testsuite/ld-loongarch-elf/ie-le-relax.d +++ b/ld/testsuite/ld-loongarch-elf/ie-le-relax.d @@ -1,5 +1,5 @@ #as: -#ld: -z norelro -e0 +#ld: -e0 #objdump: -dr -M no-aliases #skip: loongarch32-*-* diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp index 161cc1a..507b244 100644 --- a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp +++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp @@ -133,6 +133,10 @@ if [istarget "loongarch64-*-*"] { run_dump_test "desc-relax" } + if [check_pie_support] { + run_dump_test "pie_discard" + } + run_dump_test "max_imm_b16" run_dump_test "max_imm_b21" run_dump_test "max_imm_b26" @@ -145,7 +149,6 @@ if [istarget "loongarch64-*-*"] { run_dump_test "underflow_b21" run_dump_test "underflow_b26" run_dump_test "underflow_pcrel20" - run_dump_test "pie_discard" run_dump_test "desc-le-norelax" run_dump_test "desc-le-relax" run_dump_test "ie-le-norelax" diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.d b/ld/testsuite/ld-loongarch-elf/macro_op_32.d index a7349aa..8fd6992 100644 --- a/ld/testsuite/ld-loongarch-elf/macro_op_32.d +++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.d @@ -49,12 +49,16 @@ Disassembly of section .text: 3c: R_LARCH_RELAX \*ABS\* 40: 14000004 lu12i.w \$a0, 0 40: R_LARCH_TLS_LE_HI20 TLS1 + 40: R_LARCH_RELAX \*ABS\* 44: 03800084 ori \$a0, \$a0, 0x0 44: R_LARCH_TLS_LE_LO12 TLS1 + 44: R_LARCH_RELAX \*ABS\* 48: 1a000004 pcalau12i \$a0, 0 48: R_LARCH_TLS_IE_PC_HI20 TLS1 + 48: R_LARCH_RELAX \*ABS\* 4c: 28800084 ld.w \$a0, \$a0, 0 4c: R_LARCH_TLS_IE_PC_LO12 TLS1 + 4c: R_LARCH_RELAX \*ABS\* 50: 1a000004 pcalau12i \$a0, 0 50: R_LARCH_TLS_LD_PC_HI20 TLS1 50: R_LARCH_RELAX \*ABS\* |