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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2007-05-21 06:36:01 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2007-05-21 06:36:01 +0000 |
| commit | 7df428b11639efa0ec64b3f10a2472bd68316179 (patch) | |
| tree | d57b57951375d3ece592152d10eea364126e9516 /ld/testsuite | |
| parent | 56c40d18e2015b46cf5455850e88e3f68882ca51 (diff) | |
| download | gdb-7df428b11639efa0ec64b3f10a2472bd68316179.zip gdb-7df428b11639efa0ec64b3f10a2472bd68316179.tar.gz gdb-7df428b11639efa0ec64b3f10a2472bd68316179.tar.bz2 | |
binutils/
* objdump.c (disassemble_bytes): Ignore disassembler_needs_relocs
for executables and shared libraries.
ld/testsuite/
* ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s,
* ld-arm/emit-relocs1-vxworks.d: New tests.
* ld-arm/arm-elf.exp: Run them.
* ld-arm/vxworks1.dd: Expect proper branch targets.
Diffstat (limited to 'ld/testsuite')
| -rw-r--r-- | ld/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 2 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/emit-relocs1-vxworks.d | 12 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/emit-relocs1.d | 12 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/emit-relocs1.s | 6 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/vxworks1.dd | 6 |
6 files changed, 42 insertions, 3 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 234ce37..4f67d3f 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2007-05-21 Richard Sandiford <richard@codesourcery.com> + + * ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s, + * ld-arm/emit-relocs1-vxworks.d: New tests. + * ld-arm/arm-elf.exp: Run them. + * ld-arm/vxworks1.dd: Expect proper branch targets. + 2007-05-18 Joseph Myers <joseph@codesourcery.com> * ld-elf/group.ld: Discard .reginfo. diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 942d67f..af4921e 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -41,6 +41,7 @@ if {[istarget "arm-*-vxworks"]} { } run_ld_link_tests $armvxworkstests run_dump_test "vxworks1-static" + run_dump_test "emit-relocs1-vxworks" } # Exclude non-ARM-ELF targets. @@ -175,6 +176,7 @@ run_dump_test "group-relocs-ldrs-bad" run_dump_test "group-relocs-ldc-bad" run_dump_test "thumb2-bl-as-thumb1-bad" run_dump_test "thumb2-bl-bad" +run_dump_test "emit-relocs1" # Exclude non-ARM-EABI targets. diff --git a/ld/testsuite/ld-arm/emit-relocs1-vxworks.d b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d new file mode 100644 index 0000000..6d84a4c --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_PC24 target\+0xf+8 + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_PC24 target\+0x8 diff --git a/ld/testsuite/ld-arm/emit-relocs1.d b/ld/testsuite/ld-arm/emit-relocs1.d new file mode 100644 index 0000000..191cb52 --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_(JUMP|PC)24 target + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_(JUMP|PC)24 target diff --git a/ld/testsuite/ld-arm/emit-relocs1.s b/ld/testsuite/ld-arm/emit-relocs1.s new file mode 100644 index 0000000..8971d4d --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1.s @@ -0,0 +1,6 @@ + nop + nop + nop + nop + b target + b target+16 diff --git a/ld/testsuite/ld-arm/vxworks1.dd b/ld/testsuite/ld-arm/vxworks1.dd index 40a50ea..0443122 100644 --- a/ld/testsuite/ld-arm/vxworks1.dd +++ b/ld/testsuite/ld-arm/vxworks1.dd @@ -26,11 +26,11 @@ Disassembly of section \.plt: Disassembly of section \.text: 00080c00 <_start>: - 80c00: ebffff08 bl 80428 <.*> + 80c00: ebffff08 bl 80828 <.*> 80c00: R_ARM_PC24 \.plt\+0x20 - 80c04: eb000000 bl 80c14 <sexternal\+0x8> + 80c04: eb000000 bl 80c0c <sexternal> 80c04: R_ARM_PC24 sexternal\+0xfffffff8 - 80c08: eaffff00 b 80408 <.*> + 80c08: eaffff00 b 80810 <.*> 80c08: R_ARM_PC24 \.plt\+0x8 00080c0c <sexternal>: |