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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:36:23 +0800 |
|---|---|---|
| committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:43:19 +0800 |
| commit | bd782c07b914f28fd927cec42eacd8adcf556dca (patch) | |
| tree | 5fe589fdb8177e2471661eca4f913e6a9616630c /ld/testsuite | |
| parent | ac8cb70f3690b4eace1325c7ff918dce9073da7c (diff) | |
| download | gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.zip gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.tar.gz gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.tar.bz2 | |
[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
bfd/
* archures.c (bfd_architecture): New machine
bfd_mach_mips_gs464e.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (enum I_xxx): Likewise.
(arch_info_struct): Likewise.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle
E_MIPS_MACH_GS464E.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Map bfd_mach_mips_gs464e to
bfd_mach_mips_gs464 extension.
binutils/
* NEWS: Mention Loongson 3A2000/3A3000 proccessor support.
* readelf.c (get_machine_flags): Handle gs464e.
elfcpp/
* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.
gas/
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
(mips_cpu_info_table): Add gs464e descriptors.
* doc/as.texi (march table): Add gs464e.
include/
* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
* opcode/mips.h (CPU_XXX): New CPU_GS464E.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
gs464e and gs464.
opcodes/
* mips-dis.c (mips_arch_choices): Add gs464e descriptors.
Diffstat (limited to 'ld/testsuite')
| -rw-r--r-- | ld/testsuite/ld-mips-elf/mips-elf-flags.exp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp index 93cdbfe..dcd33ba 100644 --- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp +++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp @@ -315,3 +315,8 @@ good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \ { mips32r2 interaptiv-mr2 } \ MIPS32r5 "Imagination interAptiv MR2" \ { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } + +good_combination { "-march=gs464 -32" "-march=gs464e -32" } \ + { gs464e o32 } \ + MIPS64r2 "None" \ + { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" } |