diff options
author | Nathan Sidwell <nathan@codesourcery.com> | 2009-01-26 15:27:04 +0000 |
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committer | Nathan Sidwell <nathan@codesourcery.com> | 2009-01-26 15:27:04 +0000 |
commit | 9bc4e62bdc0fdb16a98730b9bc038b2cea6b39e4 (patch) | |
tree | acc48d95e222d78831fdf4341e6e213f035ea85c /ld/testsuite | |
parent | 02b0b1aa7702634955c7972e33403e1d37ed6602 (diff) | |
download | gdb-9bc4e62bdc0fdb16a98730b9bc038b2cea6b39e4.zip gdb-9bc4e62bdc0fdb16a98730b9bc038b2cea6b39e4.tar.gz gdb-9bc4e62bdc0fdb16a98730b9bc038b2cea6b39e4.tar.bz2 |
* ld-powerpc/powerpc.exp: Add vxworks relax testcase.
* ld-powerpc/vxworks-relax.s, ld-powerpc/vxworks-relax.rd: New.
* ld-powerpc/vxworks1.ld: Add .pad and .far input sections.
* ld-powerpc/vxworks1.rd: Correct regexp for undefined symbols.
Diffstat (limited to 'ld/testsuite')
-rw-r--r-- | ld/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/powerpc.exp | 5 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks-relax.rd | 9 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks-relax.s | 13 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1.ld | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1.rd | 4 |
6 files changed, 37 insertions, 3 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index b708780..78b39cd 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2009-01-26 Nathan Sidwell <nathan@codesourcery.com> + + * ld-powerpc/powerpc.exp: Add vxworks relax testcase. + * ld-powerpc/vxworks-relax.s, ld-powerpc/vxworks-relax.rd: New. + * ld-powerpc/vxworks1.ld: Add .pad and .far input sections. + * ld-powerpc/vxworks1.rd: Correct regexp for undefined symbols. + 2009-01-26 Andrew Stubbs <ams@codesourcery.com> * ld-arm/attr-merge-3.attr: Update following gas change. diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp index af812a0..1630cd7 100644 --- a/ld/testsuite/ld-powerpc/powerpc.exp +++ b/ld/testsuite/ld-powerpc/powerpc.exp @@ -49,6 +49,11 @@ if {[istarget "*-*-vxworks"]} { "-mregnames" {vxworks2.s} {{readelf --segments vxworks2-static.sd}} "vxworks2"} + {"VxWorks relax test" + "-Tvxworks1.ld --relax -q" + "-mregnames" {vxworks-relax.s} + {{readelf --relocs vxworks-relax.rd}} + "vxworks-relax"} } run_ld_link_tests $ppcvxtests run_dump_test "vxworks1-static" diff --git a/ld/testsuite/ld-powerpc/vxworks-relax.rd b/ld/testsuite/ld-powerpc/vxworks-relax.rd new file mode 100644 index 0000000..e28094c --- /dev/null +++ b/ld/testsuite/ld-powerpc/vxworks-relax.rd @@ -0,0 +1,9 @@ + +Relocation section '.rela.text' at offset 0x4010150 contains 6 entries: + Offset Info Type Sym.Value Sym. Name \+ Addend +00080012 00000106 R_PPC_ADDR16_HA 00080000 .text \+ 4000020 +00080016 00000104 R_PPC_ADDR16_LO 00080000 .text \+ 4000020 +00080006 00000106 R_PPC_ADDR16_HA 00080000 .text \+ 4000020 +0008000a 00000104 R_PPC_ADDR16_LO 00080000 .text \+ 4000020 +0408002a 00000306 R_PPC_ADDR16_HA 00080000 _start \+ 0 +0408002e 00000304 R_PPC_ADDR16_LO 00080000 _start \+ 0 diff --git a/ld/testsuite/ld-powerpc/vxworks-relax.s b/ld/testsuite/ld-powerpc/vxworks-relax.s new file mode 100644 index 0000000..b4ebb9a --- /dev/null +++ b/ld/testsuite/ld-powerpc/vxworks-relax.s @@ -0,0 +1,13 @@ + .globl _start +_start: + bl elsewhere + lis 9,elsewhere@ha + la 0,elsewhere@l(9) + + + .section .far,"ax",@progbits +elsewhere: + bl _start + + .section .pad + .space 0x4000000 diff --git a/ld/testsuite/ld-powerpc/vxworks1.ld b/ld/testsuite/ld-powerpc/vxworks1.ld index ce750b0..3106d55 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.ld +++ b/ld/testsuite/ld-powerpc/vxworks1.ld @@ -14,7 +14,7 @@ SECTIONS .plt : { *(.plt) } . = ALIGN (0x400); - .text : { *(.text) } + .text : { *(.text) *(.pad) *(.far) } . = ALIGN (0x10000); .dynamic : { *(.dynamic) } diff --git a/ld/testsuite/ld-powerpc/vxworks1.rd b/ld/testsuite/ld-powerpc/vxworks1.rd index 27d2404..b8591a8 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.rd +++ b/ld/testsuite/ld-powerpc/vxworks1.rd @@ -1,8 +1,8 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -0009040c .*15 R_PPC_JMP_SLOT 00080820 sglobal \+ 0 -00090410 .*15 R_PPC_JMP_SLOT 00080840 foo \+ 0 +0009040c .*15 R_PPC_JMP_SLOT 00000000 sglobal \+ 0 +00090410 .*15 R_PPC_JMP_SLOT 00000000 foo \+ 0 Relocation section '\.rela\.text' at offset .* contains 3 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend |