Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add DWARF debug info support to the Z80 assembler.

	PR 25469
bfd	* archures.c: Add GBZ80 and Z80N machine values.
	* reloc.c: Add BFD_RELOC_Z80_16_BE.
	* coff-z80.c: Add support for new reloc.
	* coffcode.h: Add support for new machine values.
	* cpu-z80.c: Add support for new machine names.
	* elf32-z80.c: Add support for new reloc.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

binutils* readelf.c (get_machine_flags): Add support for Z80N machine
	number.

gas	* config/tc-z80.c: Add -gbz80 command line option to generate code
	for the GameBoy Z80.  Add support for generating DWARF.
	* config/tc-z80.h: Add support for DWARF debug information
	generation.
	* doc/c-z80.texi: Document new command line option.
	* testsuite/gas/z80/gbz80_all.d: New file.
	* testsuite/gas/z80/gbz80_all.s: New file.
	* testsuite/gas/z80/z80.exp: Run the new tests.
	* testsuite/gas/z80/z80n_all.d: New file.
	* testsuite/gas/z80/z80n_all.s: New file.
	* testsuite/gas/z80/z80n_reloc.d: New file.

include	* coff/internal.h (R_IMM16BE): Define.
	* elf/z80.h (EF_Z80_MACH_Z80N): Define.
	(R_Z80_16_BE): New reloc.

ld	* emulparams/elf32z80.sh: Use z80 emulation.
	* emultempl/z80.em: Make generic to both COFF and ELF Z80 emulations.
	* emultempl/z80elf.em: Delete.
	* testsuite/ld-elf/pr22450.d: Expect to fail for the Z80.
	* testsuite/ld-elf/sec64k.exp: Fix Z80 assembly.
	* testsuite/ld-unique/pr21529.s: Avoid register name conflict.
	* testsuite/ld-unique/unique.s: Likewise.
	* testsuite/ld-unique/unique_empty.s: Likewise.
	* testsuite/ld-unique/unique_shared.s: Likewise.
	* testsuite/ld-unique/unique.d: Updated expected output.
	* testsuite/ld-z80/arch_z80n.d: New file.
	* testsuite/ld-z80/comb_arch_z80_z80n.d: New file.
	* testsuite/ld-z80/labels.s: Add more labels.
	* testsuite/ld-z80/relocs.s: Add more reloc tests.
	* testsuite/ld-z80/relocs_f_z80n.d: New file

opcodes	* z80-dis.c: Add support for GBZ80 opcodes.

12 files changed, 146 insertions, 12 deletions

diff --git a/ld/testsuite/ld-elf/pr22450.d b/ld/testsuite/ld-elf/pr22450.d
index 5b219b7..30754ec 100644
--- a/ld/testsuite/ld-elf/pr22450.d
+++ b/ld/testsuite/ld-elf/pr22450.d
@@ -1,6 +1,7 @@
 #source: pr22450.s
 #readelf: --notes --wide
 #ld: -r
+#xfail: z80-*-*
 # Fails on H8300 because it does not generate the correct relocs for the size fields.
 # Fails on AVR, IP2K, M68HC11, XC16C because the assembler does not calculate the correct values for the differences of local symbols.
 # Fails on CRX because readelf does not know how to apply CRX reloc number 20 (R_CRX_SWITCH32).
diff --git a/ld/testsuite/ld-elf/sec64k.exp b/ld/testsuite/ld-elf/sec64k.exp
index 892f8c4..7c85979 100644
--- a/ld/testsuite/ld-elf/sec64k.exp
+++ b/ld/testsuite/ld-elf/sec64k.exp
@@ -130,6 +130,10 @@ if { ![istarget "m32r-*-*"] } then {
     foreach sfile [lrange $sfiles 0 [expr [llength $sfiles] / 2]] {
 	puts $ofd "#source: $sfile"
     }
+    #force z80 target to compile for eZ80 in ADL mode
+    if { [istarget "z80-*-*"] } then {
+	puts $ofd "#as: -ez80-adl"
+    }
     puts $ofd "#ld: -r"
     puts $ofd "#readelf: -W -Ss"
     puts $ofd "There are 680.. section headers.*:"
@@ -180,6 +184,10 @@ if { ![istarget "d10v-*-*"]
     } else {
 	puts $ofd "#ld:"
     }
+    #force z80 target to compile for eZ80 in ADL mode
+    if { [istarget "z80-*-*"] } then {
+	puts $ofd "#as: -ez80-adl"
+    }
     puts $ofd "#readelf: -W -Ss"
     puts $ofd "There are 660.. section headers.*:"
     puts $ofd "#..."
diff --git a/ld/testsuite/ld-unique/pr21529.s b/ld/testsuite/ld-unique/pr21529.s
index 4570635..fd09d61 100644
--- a/ld/testsuite/ld-unique/pr21529.s
+++ b/ld/testsuite/ld-unique/pr21529.s
@@ -1,8 +1,8 @@
-	.type a, %gnu_unique_object
-a:	.long 0
-	.size a, .-a
+	.type a_val, %gnu_unique_object
+a_val:	.long 0
+	.size a_val, .-a_val
 
         .type main,"function"
         .global main
 main:
-        .dc.a a
+	.dc.a a_val
diff --git a/ld/testsuite/ld-unique/unique.d b/ld/testsuite/ld-unique/unique.d
index 73c939b..77422d5 100644
--- a/ld/testsuite/ld-unique/unique.d
+++ b/ld/testsuite/ld-unique/unique.d
@@ -5,5 +5,5 @@
 #...
  *OS/ABI: +UNIX - GNU
 #...
- *[0-9]+: +[0-9a-f]+ +[0-9]+ +OBJECT +UNIQUE +DEFAULT +[0-9]+ a
+ *[0-9]+: +[0-9a-f]+ +[0-9]+ +OBJECT +UNIQUE +DEFAULT +[0-9]+ a_val
 #pass
diff --git a/ld/testsuite/ld-unique/unique.s b/ld/testsuite/ld-unique/unique.s
index 7477a69..cd5e64e 100644
--- a/ld/testsuite/ld-unique/unique.s
+++ b/ld/testsuite/ld-unique/unique.s
@@ -1,6 +1,6 @@
-	.type a, %gnu_unique_object
-a:	.long 0
-	.size a, .-a
+	.type a_val, %gnu_unique_object
+a_val:	.long 0
+	.size a_val, .-a_val
 
         .type main,"function"
         .global main
diff --git a/ld/testsuite/ld-unique/unique_empty.s b/ld/testsuite/ld-unique/unique_empty.s
index c4c52c2..4896641 100644
--- a/ld/testsuite/ld-unique/unique_empty.s
+++ b/ld/testsuite/ld-unique/unique_empty.s
@@ -1,4 +1,4 @@
         .type main,"function"
         .global main
 main:
-        .dc.a b
+	.dc.a b_val
diff --git a/ld/testsuite/ld-unique/unique_shared.s b/ld/testsuite/ld-unique/unique_shared.s
index 8022291..f1914f3 100644
--- a/ld/testsuite/ld-unique/unique_shared.s
+++ b/ld/testsuite/ld-unique/unique_shared.s
@@ -1,3 +1,3 @@
-	.type b, %gnu_unique_object
-b:	.long 0
-	.size b, .-b
+	.type b_val, %gnu_unique_object
+b_val:	.long 0
+	.size b_val, .-b_val
diff --git a/ld/testsuite/ld-z80/arch_z80n.d b/ld/testsuite/ld-z80/arch_z80n.d
new file mode 100644
index 0000000..69754b3
--- /dev/null
+++ b/ld/testsuite/ld-z80/arch_z80n.d
@@ -0,0 +1,11 @@
+#name: Z80N arch test
+#source: dummy1.s -z80n
+#source: dummy2.s -z80n
+#ld: -e 0
+#objdump: -f
+
+.*:[     ]+file format (coff|elf32)\-z80
+architecture: z80n, flags 0x[0-9a-fA-F]+:
+.*
+.*
+
diff --git a/ld/testsuite/ld-z80/comb_arch_z80_z80n.d b/ld/testsuite/ld-z80/comb_arch_z80_z80n.d
new file mode 100644
index 0000000..96319a2
--- /dev/null
+++ b/ld/testsuite/ld-z80/comb_arch_z80_z80n.d
@@ -0,0 +1,11 @@
+#name: Z80/Z80N arch combination test
+#source: dummy1.s -z80
+#source: dummy2.s -z80n
+#ld: -e 0
+#objdump: -f
+
+.*:[     ]+file format (coff|elf32)\-z80
+architecture: z80n, flags 0x[0-9a-fA-F]+:
+.*
+.*
+
diff --git a/ld/testsuite/ld-z80/labels.s b/ld/testsuite/ld-z80/labels.s
index a957fef..395cfb2 100644
--- a/ld/testsuite/ld-z80/labels.s
+++ b/ld/testsuite/ld-z80/labels.s
@@ -9,6 +9,9 @@
 	.globl	label8
 	.globl	label9
 	.globl	value8
+	.globl	value8_1
+	.globl	value8_2
+	.globl	value8_3
 	.globl	value16
 	.globl	value24
 	.globl	value32
@@ -35,6 +38,9 @@ label9:
 	cpl
 
 value8	.equ 0x12
+value8_1	.equ 0xab
+value8_2	.equ 0xcd
+value8_3	.equ 0xef
 value16	.equ	0x1234
 value24	.equ	0x123456
 value32	.equ	0x12345678
diff --git a/ld/testsuite/ld-z80/relocs.s b/ld/testsuite/ld-z80/relocs.s
index 131a702..422b067 100644
--- a/ld/testsuite/ld-z80/relocs.s
+++ b/ld/testsuite/ld-z80/relocs.s
@@ -12,6 +12,9 @@
 	.globl	label9
 
 	.globl	value8
+	.globl	value8_1
+	.globl	value8_2
+	.globl	value8_3
 	.globl	value16
 	.globl	value24
 	.globl	value32
@@ -74,6 +77,14 @@ field_0_1	.equ	field_0+90
 	ld	h,(value32 + 0x12345678) >> 8
 	ld	l,(value32 + 0x12345678) >> 0
 
+	.ifdef Z80N
+	push	label1
+	push	value16
+	nextreg	value8_1,value8_2
+	nextreg	value8_3,a
+	ld	a,a
+	.endif
+
 	.data
 	.db	value8
 	.dw	value16
diff --git a/ld/testsuite/ld-z80/relocs_f_z80n.d b/ld/testsuite/ld-z80/relocs_f_z80n.d
new file mode 100644
index 0000000..8cf0ab8
--- /dev/null
+++ b/ld/testsuite/ld-z80/relocs_f_z80n.d
@@ -0,0 +1,86 @@
+#name: Z80N forward relocation
+#as: -z80n --defsym Z80N=1
+#source: relocs.s
+#source: labels.s
+#ld: -e 0 -Ttext 0x100 -Tdata 0x200
+#objdump: -d
+
+
+.*:[     ]+file format (coff|elf32)\-z80
+
+
+.* \.text:
+
+0+100 <.*>:
+[ ]+100:[ 	]+cd 7d 01[    	]+call 0x017d
+[ ]+103:[ 	]+c4 7e 01[    	]+call nz,0x017e
+[ ]+106:[ 	]+cc 7f 01[    	]+call z,0x017f
+[ ]+109:[ 	]+d4 80 01[    	]+call nc,0x0180
+[ ]+10c:[ 	]+dc 81 01[    	]+call c,0x0181
+[ ]+10f:[ 	]+e4 82 01[    	]+call po,0x0182
+[ ]+112:[ 	]+ec 83 01[    	]+call pe,0x0183
+[ ]+115:[ 	]+f4 84 01[    	]+call p,0x0184
+[ ]+118:[ 	]+fc 85 01[    	]+call m,0x0185
+[ ]+11b:[ 	]+c3 7d 01[    	]+jp 0x017d
+[ ]+11e:[ 	]+c2 7e 01[    	]+jp nz,0x017e
+[ ]+121:[ 	]+ca 7f 01[    	]+jp z,0x017f
+[ ]+124:[ 	]+d2 80 01[    	]+jp nc,0x0180
+[ ]+127:[ 	]+da 81 01[    	]+jp c,0x0181
+[ ]+12a:[ 	]+e2 82 01[    	]+jp po,0x0182
+[ ]+12d:[ 	]+ea 83 01[    	]+jp pe,0x0183
+[ ]+130:[ 	]+f2 84 01[    	]+jp p,0x0184
+[ ]+133:[ 	]+fa 85 01[    	]+jp m,0x0185
+[ ]+136:[ 	]+dd 6e 05[    	]+ld l,\(ix\+5\)
+[ ]+139:[ 	]+dd 7e 03[    	]+ld a,\(ix\+3\)
+[ ]+13c:[ 	]+dd 4e fa[    	]+ld c,\(ix\-6\)
+[ ]+13f:[ 	]+dd 46 f9[    	]+ld b,\(ix\-7\)
+[ ]+142:[ 	]+fd 75 fb[    	]+ld \(iy\-5\),l
+[ ]+145:[ 	]+fd 77 03[    	]+ld \(iy\+3\),a
+[ ]+148:[ 	]+fd 71 0e[    	]+ld \(iy\+14\),c
+[ ]+14b:[ 	]+fd 70 0f[    	]+ld \(iy\+15\),b
+[ ]+14e:[ 	]+fd 66 5d[    	]+ld h,\(iy\+93\)
+[ ]+151:[ 	]+11 34 12[    	]+ld de,0x1234
+[ ]+154:[ 	]+21 78 56[    	]+ld hl,0x5678
+[ ]+157:[ 	]+11 68 24[    	]+ld de,0x2468
+[ ]+15a:[ 	]+21 f0 ac[    	]+ld hl,0xacf0
+[ ]+15d:[ 	]+16 12[       	]+ld d,0x12
+[ ]+15f:[ 	]+1e 34[       	]+ld e,0x34
+[ ]+161:[ 	]+26 56[       	]+ld h,0x56
+[ ]+163:[ 	]+2e 78[       	]+ld l,0x78
+[ ]+165:[ 	]+16 24[       	]+ld d,0x24
+[ ]+167:[ 	]+1e 68[       	]+ld e,0x68
+[ ]+169:[ 	]+26 ac[       	]+ld h,0xac
+[ ]+16b:[ 	]+2e f0[       	]+ld l,0xf0
+[ ]+16d:[ 	]+ed 8a 01 7d[ 	]+push 0x017d
+[ ]+171:[ 	]+ed 8a 12 34[ 	]+push 0x1234
+[ ]+175:[ 	]+ed 91 ab cd[ 	]+nextreg 0xab,0xcd
+[ ]+179:[ 	]+ed 92 ef[    	]+nextreg 0xef,a
+[ ]+17c:[ 	]+7f[          	]+ld a,a
+
+0+17d <label1>:
+[ ]+17d:[ 	]+78[          	]+ld a,b
+
+0+17e <label2>:
+[ ]+17e:[ 	]+79[          	]+ld a,c
+
+0+17f <label3>:
+[ ]+17f:[ 	]+7a[          	]+ld a,d
+
+0+180 <label4>:
+[ ]+180:[ 	]+7b[          	]+ld a,e
+
+0+181 <label5>:
+[ ]+181:[ 	]+7c[          	]+ld a,h
+
+0+182 <label6>:
+[ ]+182:[ 	]+7d[          	]+ld a,l
+
+0+183 <label7>:
+[ ]+183:[ 	]+7e[          	]+ld a,\(hl\)
+
+0+184 <label8>:
+[ ]+184:[ 	]+7f[          	]+ld a,a
+
+0+185 <label9>:
+[ ]+185:[ 	]+2f[          	]+cpl
+#pass