bfd:

	* elf32-tic6x.h: New.
	* elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA.
	* elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata,
	elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel,
	elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject,
	elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p,
	bfd_elf32_mkobject, bfd_elf32_new_section_hook): New.
	(elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup,
	elf32_tic6x_relocate_section): Handle REL relocations.
	(elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel.

gas:
	* config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
	(md_longopts): Add -mgenerate-rel.
	(tic6x_generate_rela): New.
	(md_parse_option): Handle -mgenerate-rel.
	(md_show_usage): Add comment that -mgenerate-rel is undocumented.
	(tic6x_init_after_args): New.
	(md_apply_fix): Correct shift calculations for SB-relative
	relocations.
	(md_pcrel_from): Change to tic6x_pcrel_from_section.  Do not
	adjust addresses for relocations referencing symbols in other
	sections.
	(tc_gen_reloc): Adjust addend calculations for REL relocations.
	* config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
	tic6x_pcrel_from_section, tc_init_after_args,
	tic6x_init_after_args): New.

ld/testsuite:
	* ld-tic6x/data-reloc-global-rel.d,
	ld-tic6x/data-reloc-global-rel.s,
	ld-tic6x/data-reloc-local-r-rel.d,
	ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d,
	ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s,
	ld-tic6x/mvk-reloc-local-2-rel.s,
	ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d,
	ld-tic6x/pcrel-reloc-global-rel.d,
	ld-tic6x/pcrel-reloc-local-r-rel.d,
	ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d,
	ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s,
	ld-tic6x/sbr-reloc-local-2-rel.s,
	ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d:
	New.

20 files changed, 488 insertions, 0 deletions

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index dbeb91b..3556c5b 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2010-04-20  Joseph Myers  <joseph@codesourcery.com>
+
+	* ld-tic6x/data-reloc-global-rel.d,
+	ld-tic6x/data-reloc-global-rel.s,
+	ld-tic6x/data-reloc-local-r-rel.d,
+	ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d,
+	ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s,
+	ld-tic6x/mvk-reloc-local-2-rel.s,
+	ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d,
+	ld-tic6x/pcrel-reloc-global-rel.d,
+	ld-tic6x/pcrel-reloc-local-r-rel.d,
+	ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d,
+	ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s,
+	ld-tic6x/sbr-reloc-local-2-rel.s,
+	ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d:
+	New.
+
 2010-04-15  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 
 	* ld-arm/attr-merge-2.attr: Update for changes in attribute output.
diff --git a/ld/testsuite/ld-tic6x/data-reloc-global-rel.d b/ld/testsuite/ld-tic6x/data-reloc-global-rel.d
new file mode 100644
index 0000000..82e2caf
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-global-rel.d
@@ -0,0 +1,11 @@
+#name: C6X data relocations, global symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym sff=0xff --defsym sffff=0xffff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffff80=0xffffff80 --defsym sffffffff=0xffffffff
+#source: data-reloc-global-rel.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+Contents of section \.data:
+[ \t]*0080 00000080 ffffffff 00000000 feffffff  \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.
+[ \t]*0090 00000000 ffffffff 00800080 ffff8080  \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.
diff --git a/ld/testsuite/ld-tic6x/data-reloc-global-rel.s b/ld/testsuite/ld-tic6x/data-reloc-global-rel.s
new file mode 100644
index 0000000..8c7ba2e
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-global-rel.s
@@ -0,0 +1,21 @@
+.globl s0
+.globl sff
+.globl sffff
+.globl s80000000
+.globl sffff8000
+.globl sffffff80
+.globl sffffffff
+.data
+	.word s80000000
+	.word sffffffff
+	.word s0
+	.word sffffffff+0xffffffff
+	.word s80000000+0x80000000
+	.short sffffffff
+	.short sffff
+	.short sffff8000
+	.short s0-0x8000
+	.byte sffffffff
+	.byte sff
+	.byte sffffff80
+	.byte s0-0x80
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local-r-rel.d b/ld/testsuite/ld-tic6x/data-reloc-local-r-rel.d
new file mode 100644
index 0000000..18f23f9
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local-r-rel.d
@@ -0,0 +1,23 @@
+#name: C6X data relocations, local symbols, -r, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -r -melf32_tic6x_le
+#source: data-reloc-local-1.s
+#source: data-reloc-local-2.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+RELOCATION RECORDS FOR \[\.data\]:
+OFFSET   TYPE              VALUE 
+0+ R_C6000_ABS32     \.data
+0+4 R_C6000_ABS32     \.data
+0+8 R_C6000_ABS32     \.data
+0+c R_C6000_ABS32     \.data
+0+10 R_C6000_ABS16     \.data
+0+12 R_C6000_ABS8      \.data
+0+13 R_C6000_ABS8      \.data
+
+
+Contents of section \.data:
+[ \t]*0000 00000000 04000000 0c000000 08000000  \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.
+[ \t]*0010 0c00080c                             \.\.\.\.            
diff --git a/ld/testsuite/ld-tic6x/data-reloc-local-rel.d b/ld/testsuite/ld-tic6x/data-reloc-local-rel.d
new file mode 100644
index 0000000..686ca6e
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/data-reloc-local-rel.d
@@ -0,0 +1,12 @@
+#name: C6X data relocations, local symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: data-reloc-local-1.s
+#source: data-reloc-local-2.s
+#objdump: -r -s -j .data
+
+.*: *file format elf32-tic6x-le
+
+Contents of section \.data:
+[ \t]*0080 80000000 84000000 8c000000 88000000  .*
+[ \t]*0090 8c00888c                             .*
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.d b/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.d
new file mode 100644
index 0000000..a082bbf
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.d
@@ -0,0 +1,20 @@
+#name: C6X MVK relocations, global symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym s7fff=0x7fff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffffff=0xffffffff
+#source: mvk-reloc-global-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+10000004:[ \t]+00ffffa8[ \t]+mvk \.S1 -1,a1
+10000008:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+1000000c:[ \t]+00ffff28[ \t]+mvk \.S1 -2,a1
+10000010:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+10000014:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+10000018:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
+1000001c:[ \t]+00000000[ \t]+nop 1
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.s b/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.s
new file mode 100644
index 0000000..0690873
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-global-rel.s
@@ -0,0 +1,14 @@
+.globl s0
+.globl s7fff
+.globl s80000000
+.globl sffff8000
+.globl sffffffff
+.text
+.nocmp
+	mvkl .S1 s80000000,a1
+	mvkl .S1 sffffffff,a1
+	mvkl .S1 s0,a1
+	mvkl .S1 sffffffff+0xffffffff,a1
+	mvk .S1 sffff8000,a1
+	mvk .S1 s0-0x8000,a1
+	mvk .S1 s7fff,a1
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-1-rel.s b/ld/testsuite/ld-tic6x/mvk-reloc-local-1-rel.s
new file mode 100644
index 0000000..1255177
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-1-rel.s
@@ -0,0 +1,11 @@
+.text
+.nocmp
+	mvk .S1 a,a1
+	mvkl .S1 b,a2
+.data
+a:
+	.word 0
+b:
+	.word 0
+c:
+	.word 0
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-2-rel.s b/ld/testsuite/ld-tic6x/mvk-reloc-local-2-rel.s
new file mode 100644
index 0000000..320c988
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-2-rel.s
@@ -0,0 +1,11 @@
+.text
+.nocmp
+	mvk .S1 d,a1
+	mvkl .S1 e,a2
+.data
+d:
+	.word 0
+e:
+	.word 0
+f:
+	.word 0
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-r-rel.d b/ld/testsuite/ld-tic6x/mvk-reloc-local-r-rel.d
new file mode 100644
index 0000000..dcbd55b
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-r-rel.d
@@ -0,0 +1,23 @@
+#name: C6X MVK relocations, local symbols, -r, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -r -melf32_tic6x_le
+#source: mvk-reloc-local-1-rel.s
+#source: mvk-reloc-local-2-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*0: R_C6000_ABS_S16[ \t]+\.data
+[ \t]*4:[ \t]+01000228[ \t]+mvk \.S1 4,a2
+[ \t]*4: R_C6000_ABS_L16[ \t]+\.data
+[ \t]*\.\.\.
+[ \t]*20:[ \t]+00800628[ \t]+mvk \.S1 12,a1
+[ \t]*20: R_C6000_ABS_S16[ \t]+\.data
+[ \t]*24:[ \t]+01000828[ \t]+mvk \.S1 16,a2
+[ \t]*24: R_C6000_ABS_L16[ \t]+\.data
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-rel.d b/ld/testsuite/ld-tic6x/mvk-reloc-local-rel.d
new file mode 100644
index 0000000..d91a693
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-rel.d
@@ -0,0 +1,19 @@
+#name: C6X MVK relocations, local symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: mvk-reloc-local-1-rel.s
+#source: mvk-reloc-local-2-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00804028[ \t]+mvk \.S1 128,a1
+10000004:[ \t]+01004228[ \t]+mvk \.S1 132,a2
+[ \t]*\.\.\.
+10000020:[ \t]+00804628[ \t]+mvk \.S1 140,a1
+10000024:[ \t]+01004828[ \t]+mvk \.S1 144,a2
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-global-rel.d b/ld/testsuite/ld-tic6x/pcrel-reloc-global-rel.d
new file mode 100644
index 0000000..cf564e9
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-global-rel.d
@@ -0,0 +1,20 @@
+#name: C6X PC-relative relocations, global symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s7a=0x0fffff00 --defsym s7b=0x100000fc --defsym s10a=0x0ffff800 --defsym s10b=0x100007fc --defsym s12a=0x0fffe000 --defsym s12b=0x10001ffc --defsym s21a=0x0fc00000 --defsym s21b=0x103ffffc
+#source: pcrel-reloc-global.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00c00162[ \t]+addkpc \.S2 fffff00 <[^>]*>,b1,0
+10000004:[ \t]+00bf0162[ \t]+addkpc \.S2 100000fc <[^>]*>,b1,0
+10000008:[ \t]+08000012[ \t]+b \.S2 fc00000 <[^>]*>
+1000000c:[ \t]+07ffff92[ \t]+b \.S2 103ffffc <[^>]*>
+10000010:[ \t]+00c01022[ \t]+bdec \.S2 ffff800 <[^>]*>,b1
+10000014:[ \t]+00bff022[ \t]+bdec \.S2 100007fc <[^>]*>,b1
+10000018:[ \t]+08000122[ \t]+bnop \.S2 fffe000 <[^>]*>,0
+1000001c:[ \t]+07ff0122[ \t]+bnop \.S2 10001ffc <[^>]*>,0
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d
new file mode 100644
index 0000000..e54c370
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d
@@ -0,0 +1,62 @@
+#name: C6X PC-relative relocations, local symbols, -r, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -r -melf32_tic6x_le
+#source: pcrel-reloc-local-1.s
+#source: pcrel-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00000000[ \t]+nop 1
+[ \t]*4:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0
+[ \t]*4: R_C6000_PCR_S7[ \t]+\.text\.1
+[ \t]*8:[ \t]+00810162[ \t]+addkpc \.S2 4 <[^>]*>,b1,0
+[ \t]*8: R_C6000_PCR_S7[ \t]+\.text\.1
+[ \t]*c:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*>
+[ \t]*c: R_C6000_PCR_S21[ \t]+\.text\.1
+[ \t]*10:[ \t]+00000092[ \t]+b \.S2 4 <[^>]*>
+[ \t]*10: R_C6000_PCR_S21[ \t]+\.text\.1
+[ \t]*14:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1
+[ \t]*14: R_C6000_PCR_S10[ \t]+\.text\.1
+[ \t]*18:[ \t]+00803022[ \t]+bdec \.S2 4 <[^>]*>,b1
+[ \t]*18: R_C6000_PCR_S10[ \t]+\.text\.1
+[ \t]*1c:[ \t]+00000122[ \t]+bnop \.S2 0 <[^>]*>,0
+[ \t]*1c: R_C6000_PCR_S12[ \t]+\.text\.1
+[ \t]*20:[ \t]+00010122[ \t]+bnop \.S2 24 <[^>]*>,0
+[ \t]*20: R_C6000_PCR_S12[ \t]+\.text\.1
+[ \t]*\.\.\.
+[ \t]*44:[ \t]+00080122[ \t]+bnop \.S2 60 <[^>]*>,0
+[ \t]*44: R_C6000_PCR_S12[ \t]+\.text\.1
+[ \t]*48:[ \t]+00090122[ \t]+bnop \.S2 64 <[^>]*>,0
+[ \t]*48: R_C6000_PCR_S12[ \t]+\.text\.1
+[ \t]*4c:[ \t]+00811022[ \t]+bdec \.S2 60 <[^>]*>,b1
+[ \t]*4c: R_C6000_PCR_S10[ \t]+\.text\.1
+[ \t]*50:[ \t]+00813022[ \t]+bdec \.S2 64 <[^>]*>,b1
+[ \t]*50: R_C6000_PCR_S10[ \t]+\.text\.1
+[ \t]*54:[ \t]+00000412[ \t]+b \.S2 60 <[^>]*>
+[ \t]*54: R_C6000_PCR_S21[ \t]+\.text\.1
+[ \t]*58:[ \t]+00000492[ \t]+b \.S2 64 <[^>]*>
+[ \t]*58: R_C6000_PCR_S21[ \t]+\.text\.1
+[ \t]*5c:[ \t]+00880162[ \t]+addkpc \.S2 60 <[^>]*>,b1,0
+[ \t]*5c: R_C6000_PCR_S7[ \t]+\.text\.1
+[ \t]*60:[ \t]+00890162[ \t]+addkpc \.S2 84 <[^>]*>,b1,0
+[ \t]*60: R_C6000_PCR_S7[ \t]+\.text\.1
+[ \t]*\.\.\.
+
+Disassembly of section \.text\.1:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+00000000[ \t]+nop 1
+
+0+4 <[^>]*>:
+[ \t]*\.\.\.
+
+0+20 <[^>]*>:
+[ \t]*20:[ \t]+00000000[ \t]+nop 1
+
+0+24 <[^>]*>:
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d b/ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d
new file mode 100644
index 0000000..108ad53
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d
@@ -0,0 +1,44 @@
+#name: C6X PC-relative relocations, local symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tgeneric.ld
+#source: pcrel-reloc-local-1.s
+#source: pcrel-reloc-local-2.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+00000000[ \t]+nop 1
+10000004:[ \t]+00900162[ \t]+addkpc \.S2 10000040 <[^>]*>,b1,0
+10000008:[ \t]+00910162[ \t]+addkpc \.S2 10000044 <[^>]*>,b1,0
+1000000c:[ \t]+00000812[ \t]+b \.S2 10000040 <[^>]*>
+10000010:[ \t]+00000892[ \t]+b \.S2 10000044 <[^>]*>
+10000014:[ \t]+00821022[ \t]+bdec \.S2 10000040 <[^>]*>,b1
+10000018:[ \t]+00823022[ \t]+bdec \.S2 10000044 <[^>]*>,b1
+1000001c:[ \t]+00100122[ \t]+bnop \.S2 10000040 <[^>]*>,0
+10000020:[ \t]+00090122[ \t]+bnop \.S2 10000044 <[^>]*>,0
+[ \t]*\.\.\.
+
+10000040 <[^>]*>:
+10000040:[ \t]+00000000[ \t]+nop 1
+
+10000044 <[^>]*>:
+[ \t]*\.\.\.
+10000064:[ \t]+00100122[ \t]+bnop \.S2 100000a0 <[^>]*>,0
+10000068:[ \t]+00110122[ \t]+bnop \.S2 100000a4 <[^>]*>,0
+1000006c:[ \t]+00821022[ \t]+bdec \.S2 100000a0 <[^>]*>,b1
+10000070:[ \t]+00823022[ \t]+bdec \.S2 100000a4 <[^>]*>,b1
+10000074:[ \t]+00000812[ \t]+b \.S2 100000a0 <[^>]*>
+10000078:[ \t]+00000892[ \t]+b \.S2 100000a4 <[^>]*>
+1000007c:[ \t]+00900162[ \t]+addkpc \.S2 100000a0 <[^>]*>,b1,0
+10000080:[ \t]+00890162[ \t]+addkpc \.S2 100000a4 <[^>]*>,b1,0
+[ \t]*\.\.\.
+
+100000a0 <[^>]*>:
+100000a0:[ \t]+00000000[ \t]+nop 1
+
+100000a4 <[^>]*>:
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.d b/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.d
new file mode 100644
index 0000000..bc88717
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.d
@@ -0,0 +1,24 @@
+#name: C6X SB-relative relocations, global symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tsbr.ld --defsym sw1=0x80 --defsym sw2=0x2007c --defsym sh1=0x80 --defsym sh2=0x1007e --defsym sb1=0x80 --defsym sb2=0x807f --defsym sb16a=0xffff8080 --defsym sb16b=0x807f --defsym sbw=0x123456f8 --defsym shw=0x2468ad70 --defsym sww=0x48d15a60
+#source: sbr-reloc-global-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+10000004:[ \t]+00ffff6e[ \t]+ldw \.D2T2 \*\+b14\(131068\),b1
+10000008:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
+1000000c:[ \t]+00ffff4e[ \t]+ldh \.D2T2 \*\+b14\(65534\),b1
+10000010:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
+10000014:[ \t]+00ffff2e[ \t]+ldb \.D2T2 \*\+b14\(32767\),b1
+10000018:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
+1000001c:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
+10000020:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+10000024:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+10000028:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.s b/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.s
new file mode 100644
index 0000000..515e03e
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-global-rel.s
@@ -0,0 +1,24 @@
+.globl sw1
+.globl sw2
+.globl sh1
+.globl sh2
+.globl sb1
+.globl sb2
+.globl sb16a
+.globl sb16b
+.globl sbw
+.globl shw
+.globl sww
+.text
+.nocmp
+	ldw .D2T2 *+b14(sw1),b1
+	ldw .D2T2 *+b14(sw2),b1
+	ldh .D2T2 *+b14(sh1),b1
+	ldh .D2T2 *+b14(sh2),b1
+	ldb .D2T2 *+b14(sb1),b1
+	ldb .D2T2 *+b14(sb2),b1
+	mvk .S1 $dpr_byte(sb16a),a1
+	mvk .S1 $dpr_byte(sb16b),a1
+	mvkl .S1 $dpr_byte(sbw),a1
+	mvkl .S1 $dpr_hword(shw),a1
+	mvkl .S1 $dpr_word(sww),a1
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-1-rel.s b/ld/testsuite/ld-tic6x/sbr-reloc-local-1-rel.s
new file mode 100644
index 0000000..1316496
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-1-rel.s
@@ -0,0 +1,21 @@
+.text
+.nocmp
+	ldw .D2T2 *+b14(a),b1
+	ldw .D2T2 *+b14(b),b1
+	ldh .D2T2 *+b14(b),b1
+	ldh .D2T2 *+b14(c),b1
+	ldb .D2T2 *+b14(c),b1
+	ldb .D2T2 *+b14(d),b1
+	mvk .S1 $dpr_byte(d),a1
+	mvkl .S1 $dpr_byte(c),a1
+	mvkl .S1 $dpr_hword(b),a1
+	mvkl .S1 $dpr_word(a),a1
+.data
+a:
+	.word 0
+b:
+	.short 0
+c:
+	.byte 0
+d:
+	.byte 0
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-2-rel.s b/ld/testsuite/ld-tic6x/sbr-reloc-local-2-rel.s
new file mode 100644
index 0000000..e1268fb
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-2-rel.s
@@ -0,0 +1,21 @@
+.text
+.nocmp
+	ldw .D2T2 *+b14(e),b1
+	ldw .D2T2 *+b14(f),b1
+	ldh .D2T2 *+b14(f),b1
+	ldh .D2T2 *+b14(g),b1
+	ldb .D2T2 *+b14(g),b1
+	ldb .D2T2 *+b14(h),b1
+	mvk .S1 $dpr_byte(h),a1
+	mvkl .S1 $dpr_byte(g),a1
+	mvkl .S1 $dpr_hword(f),a1
+	mvkl .S1 $dpr_word(e),a1
+.data
+e:
+	.word 0
+f:
+	.short 0
+g:
+	.byte 0
+h:
+	.byte 0
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-r-rel.d b/ld/testsuite/ld-tic6x/sbr-reloc-local-r-rel.d
new file mode 100644
index 0000000..801c6a2
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-r-rel.d
@@ -0,0 +1,55 @@
+#name: C6X SB-relative relocations, local symbols, -r, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -r -melf32_tic6x_le
+#source: sbr-reloc-local-1-rel.s
+#source: sbr-reloc-local-2-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+0+ <[^>]*>:
+[ \t]*0:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+[ \t]*0: R_C6000_SBR_U15_W[ \t]+\.data
+[ \t]*4:[ \t]+0080016e[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
+[ \t]*4: R_C6000_SBR_U15_W[ \t]+\.data
+[ \t]*8:[ \t]+0080024e[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
+[ \t]*8: R_C6000_SBR_U15_H[ \t]+\.data
+[ \t]*c:[ \t]+0080034e[ \t]+ldh \.D2T2 \*\+b14\(6\),b1
+[ \t]*c: R_C6000_SBR_U15_H[ \t]+\.data
+[ \t]*10:[ \t]+0080062e[ \t]+ldb \.D2T2 \*\+b14\(6\),b1
+[ \t]*10: R_C6000_SBR_U15_B[ \t]+\.data
+[ \t]*14:[ \t]+0080072e[ \t]+ldb \.D2T2 \*\+b14\(7\),b1
+[ \t]*14: R_C6000_SBR_U15_B[ \t]+\.data
+[ \t]*18:[ \t]+008003a8[ \t]+mvk \.S1 7,a1
+[ \t]*18: R_C6000_SBR_S16[ \t]+\.data
+[ \t]*1c:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+[ \t]*1c: R_C6000_SBR_L16_B[ \t]+\.data
+[ \t]*20:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+[ \t]*20: R_C6000_SBR_L16_H[ \t]+\.data
+[ \t]*24:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*24: R_C6000_SBR_L16_W[ \t]+\.data
+[ \t]*\.\.\.
+[ \t]*40:[ \t]+0080026e[ \t]+ldw \.D2T2 \*\+b14\(8\),b1
+[ \t]*40: R_C6000_SBR_U15_W[ \t]+\.data
+[ \t]*44:[ \t]+0080036e[ \t]+ldw \.D2T2 \*\+b14\(12\),b1
+[ \t]*44: R_C6000_SBR_U15_W[ \t]+\.data
+[ \t]*48:[ \t]+0080064e[ \t]+ldh \.D2T2 \*\+b14\(12\),b1
+[ \t]*48: R_C6000_SBR_U15_H[ \t]+\.data
+[ \t]*4c:[ \t]+0080074e[ \t]+ldh \.D2T2 \*\+b14\(14\),b1
+[ \t]*4c: R_C6000_SBR_U15_H[ \t]+\.data
+[ \t]*50:[ \t]+00800e2e[ \t]+ldb \.D2T2 \*\+b14\(14\),b1
+[ \t]*50: R_C6000_SBR_U15_B[ \t]+\.data
+[ \t]*54:[ \t]+00800f2e[ \t]+ldb \.D2T2 \*\+b14\(15\),b1
+[ \t]*54: R_C6000_SBR_U15_B[ \t]+\.data
+[ \t]*58:[ \t]+008007a8[ \t]+mvk \.S1 15,a1
+[ \t]*58: R_C6000_SBR_S16[ \t]+\.data
+[ \t]*5c:[ \t]+00800728[ \t]+mvk \.S1 14,a1
+[ \t]*5c: R_C6000_SBR_L16_B[ \t]+\.data
+[ \t]*60:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+[ \t]*60: R_C6000_SBR_L16_H[ \t]+\.data
+[ \t]*64:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+[ \t]*64: R_C6000_SBR_L16_W[ \t]+\.data
+[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/sbr-reloc-local-rel.d b/ld/testsuite/ld-tic6x/sbr-reloc-local-rel.d
new file mode 100644
index 0000000..005167e
--- /dev/null
+++ b/ld/testsuite/ld-tic6x/sbr-reloc-local-rel.d
@@ -0,0 +1,35 @@
+#name: C6X SB-relative relocations, local symbols, REL
+#as: -mlittle-endian -mgenerate-rel
+#ld: -melf32_tic6x_le -Tsbr.ld
+#source: sbr-reloc-local-1-rel.s
+#source: sbr-reloc-local-2-rel.s
+#objdump: -dr
+
+.*: *file format elf32-tic6x-le
+
+
+Disassembly of section \.text:
+
+10000000 <[^>]*>:
+10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
+10000004:[ \t]+0080016e[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
+10000008:[ \t]+0080024e[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
+1000000c:[ \t]+0080034e[ \t]+ldh \.D2T2 \*\+b14\(6\),b1
+10000010:[ \t]+0080062e[ \t]+ldb \.D2T2 \*\+b14\(6\),b1
+10000014:[ \t]+0080072e[ \t]+ldb \.D2T2 \*\+b14\(7\),b1
+10000018:[ \t]+008003a8[ \t]+mvk \.S1 7,a1
+1000001c:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+10000020:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+10000024:[ \t]+00800028[ \t]+mvk \.S1 0,a1
+[ \t]*\.\.\.
+10000040:[ \t]+0080026e[ \t]+ldw \.D2T2 \*\+b14\(8\),b1
+10000044:[ \t]+0080036e[ \t]+ldw \.D2T2 \*\+b14\(12\),b1
+10000048:[ \t]+0080064e[ \t]+ldh \.D2T2 \*\+b14\(12\),b1
+1000004c:[ \t]+0080074e[ \t]+ldh \.D2T2 \*\+b14\(14\),b1
+10000050:[ \t]+00800e2e[ \t]+ldb \.D2T2 \*\+b14\(14\),b1
+10000054:[ \t]+00800f2e[ \t]+ldb \.D2T2 \*\+b14\(15\),b1
+10000058:[ \t]+008007a8[ \t]+mvk \.S1 15,a1
+1000005c:[ \t]+00800728[ \t]+mvk \.S1 14,a1
+10000060:[ \t]+00800328[ \t]+mvk \.S1 6,a1
+10000064:[ \t]+00800128[ \t]+mvk \.S1 2,a1
+[ \t]*\.\.\.