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authorThomas Preud'homme <thomas.preudhomme@arm.com>2017-06-24 10:48:08 +0100
committerThomas Preud'homme <thomas.preudhomme@arm.com>2017-06-24 10:48:08 +0100
commitbff0500d7abc215bbc6d4e9332047c023f4ce2cb (patch)
tree2baed8141bed5169ed6f67404de9001910ad0fc4 /ld/testsuite
parentced40572e478927f43a849d5c39f794868da8d38 (diff)
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[ARM] Add linker support for ARMv8-R
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARMv8-R in the linker. === Patch description === This patch is composed of 3 changes: 1) The main change is the addition of the logic for merging a file whose Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to merge merge with ARMv8-R. Note that merging only occurs if the two profiles are identical or one is S (Application or Realtime) and the other is R. 2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop are updated according to capabilities of ARMv8-R and their BFD_ASSERT updated to reflect that the logic is valid for ARMv8-R. 3) 2 build attribute merging tests are added to test the first change. 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Update list of architectures in BFD_ASSERT for which the logic is valid. (using_thumb2_bl): Likewise. (using_thumb2): Likewise and return true for ARMv8-R. (arch_has_arm_nop): Likewise. (tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch merging logic. Update commentis for value 15 of v8m_baseline, v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide merging of value 15 of Tag_CPU_arch. ld/ * testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test. (EABI attribute merging 12): Likewise. * testsuite/ld-arm/attr-merge-11a.s: New file. * testsuite/ld-arm/attr-merge-11b.s: New file. * testsuite/ld-arm/attr-merge-11.attr: New file. * testsuite/ld-arm/attr-merge-12a.s: New file. * testsuite/ld-arm/attr-merge-12b.s: New file. * testsuite/ld-arm/attr-merge-12.attr: New file.
Diffstat (limited to 'ld/testsuite')
-rw-r--r--ld/testsuite/ld-arm/arm-elf.exp6
-rw-r--r--ld/testsuite/ld-arm/attr-merge-11.attr9
-rw-r--r--ld/testsuite/ld-arm/attr-merge-11a.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-11b.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-12.attr9
-rw-r--r--ld/testsuite/ld-arm/attr-merge-12a.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-12b.s5
7 files changed, 44 insertions, 0 deletions
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 2e19332..b15316c 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -412,6 +412,12 @@ set armeabitests_common {
{"EABI attribute merging 10" "-r" "" "" {attr-merge-10a.s attr-merge-10b.s}
{{readelf -A attr-merge-10.attr}}
"attr-merge-10"}
+ {"EABI attribute merging 11" "-r" "" "" {attr-merge-11a.s attr-merge-11b.s}
+ {{readelf -A attr-merge-11.attr}}
+ "attr-merge-11"}
+ {"EABI attribute merging 12" "-r" "" "" {attr-merge-12a.s attr-merge-12b.s}
+ {{readelf -A attr-merge-12.attr}}
+ "attr-merge-12"}
{"EABI attribute merging 10 (DSP)" "-r" "" "" {attr-merge-10a.s attr-merge-10b-dsp.s}
{{readelf -A attr-merge-10-dsp.attr}}
"attr-merge-10-dsp"}
diff --git a/ld/testsuite/ld-arm/attr-merge-11.attr b/ld/testsuite/ld-arm/attr-merge-11.attr
new file mode 100644
index 0000000..0ca6dd3
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-11.attr
@@ -0,0 +1,9 @@
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "8-A"
+ Tag_CPU_arch: v8
+ Tag_CPU_arch_profile: Realtime
+ Tag_ARM_ISA_use: Yes
+ Tag_THUMB_ISA_use: Thumb-2
+ Tag_MPextension_use: Allowed
+ Tag_Virtualization_use: TrustZone and Virtualization Extensions
diff --git a/ld/testsuite/ld-arm/attr-merge-11a.s b/ld/testsuite/ld-arm/attr-merge-11a.s
new file mode 100644
index 0000000..210fbdc
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-11a.s
@@ -0,0 +1,5 @@
+ .arch armv8-a
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8 || v8-R
+ .eabi_attribute Tag_CPU_arch, 14
+ .eabi_attribute Tag_CPU_arch_profile, 'S'
diff --git a/ld/testsuite/ld-arm/attr-merge-11b.s b/ld/testsuite/ld-arm/attr-merge-11b.s
new file mode 100644
index 0000000..1bd37c8
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-11b.s
@@ -0,0 +1,5 @@
+ .arch armv8-r
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-R
+ .eabi_attribute Tag_CPU_arch, 15
+ .eabi_attribute Tag_CPU_arch_profile, 'R'
diff --git a/ld/testsuite/ld-arm/attr-merge-12.attr b/ld/testsuite/ld-arm/attr-merge-12.attr
new file mode 100644
index 0000000..77596ba
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-12.attr
@@ -0,0 +1,9 @@
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "8-R"
+ Tag_CPU_arch: v8-R
+ Tag_CPU_arch_profile: Realtime
+ Tag_ARM_ISA_use: Yes
+ Tag_THUMB_ISA_use: Thumb-2
+ Tag_MPextension_use: Allowed
+ Tag_Virtualization_use: TrustZone and Virtualization Extensions
diff --git a/ld/testsuite/ld-arm/attr-merge-12a.s b/ld/testsuite/ld-arm/attr-merge-12a.s
new file mode 100644
index 0000000..27a7c35
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-12a.s
@@ -0,0 +1,5 @@
+ .arch armv8-r
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v7-R
+ .eabi_attribute Tag_CPU_arch, 10
+ .eabi_attribute Tag_CPU_arch_profile, 'R'
diff --git a/ld/testsuite/ld-arm/attr-merge-12b.s b/ld/testsuite/ld-arm/attr-merge-12b.s
new file mode 100644
index 0000000..1bd37c8
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-12b.s
@@ -0,0 +1,5 @@
+ .arch armv8-r
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-R
+ .eabi_attribute Tag_CPU_arch, 15
+ .eabi_attribute Tag_CPU_arch_profile, 'R'