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authorRichard Earnshaw <richard.earnshaw@arm.com>2005-08-08 15:52:54 +0000
committerRichard Earnshaw <richard.earnshaw@arm.com>2005-08-08 15:52:54 +0000
commit3c2e36dc6f7dc9c54ae4e7fa50b46cfe5d1ec98b (patch)
tree4b961a5a3c318c57982aed02136cc07193269d7b /ld/testsuite
parentdf40eaf977e1422cfd1a8e55de7efffdd397447a (diff)
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* ld-arm/mixed-app.sym: Expact _stack to be in the ABS section.
* ld-arm/mixed-lib.sym: Likewise. * tls-lib.d: Use a regexp for the address locations. * tls-lib.r: Likewise.
Diffstat (limited to 'ld/testsuite')
-rw-r--r--ld/testsuite/ChangeLog7
-rw-r--r--ld/testsuite/ld-arm/mixed-app.sym2
-rw-r--r--ld/testsuite/ld-arm/mixed-lib.sym2
-rw-r--r--ld/testsuite/ld-arm/tls-lib.d14
-rw-r--r--ld/testsuite/ld-arm/tls-lib.r6
5 files changed, 19 insertions, 12 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 88d170b..95b88f1 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2005-08-08 Richard Earnshaw <richard.earnshaw@arm.com>
+
+ * ld-arm/mixed-app.sym: Expact _stack to be in the ABS section.
+ * ld-arm/mixed-lib.sym: Likewise.
+ * tls-lib.d: Use a regexp for the address locations.
+ * tls-lib.r: Likewise.
+
2005-08-03 H.J. Lu <hongjiu.lu@intel.com>
* ld-i386/pcrel16.d: Updated.
diff --git a/ld/testsuite/ld-arm/mixed-app.sym b/ld/testsuite/ld-arm/mixed-app.sym
index 0a26e4c..38952ef 100644
--- a/ld/testsuite/ld-arm/mixed-app.sym
+++ b/ld/testsuite/ld-arm/mixed-app.sym
@@ -7,7 +7,7 @@ Symbol table for image:
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
.. ..: ........ 0 OBJECT GLOBAL DEFAULT ABS _DYNAMIC
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
- .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 13 _stack
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack
.. ..: ........ 4 OBJECT GLOBAL DEFAULT 12 data_obj
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
diff --git a/ld/testsuite/ld-arm/mixed-lib.sym b/ld/testsuite/ld-arm/mixed-lib.sym
index 3327923..bc5266f 100644
--- a/ld/testsuite/ld-arm/mixed-lib.sym
+++ b/ld/testsuite/ld-arm/mixed-lib.sym
@@ -7,7 +7,7 @@ Symbol table for image:
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
.. ..: ........ 0 OBJECT GLOBAL DEFAULT ABS _DYNAMIC
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
- .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 10 _stack
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack
.. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
.. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
diff --git a/ld/testsuite/ld-arm/tls-lib.d b/ld/testsuite/ld-arm/tls-lib.d
index 80eb90d..76dcfd0 100644
--- a/ld/testsuite/ld-arm/tls-lib.d
+++ b/ld/testsuite/ld-arm/tls-lib.d
@@ -6,10 +6,10 @@ start address 0x.*
Disassembly of section .text:
-00000314 <foo>:
- 314: e1a00000 nop \(mov r0,r0\)
- 318: e1a00000 nop \(mov r0,r0\)
- 31c: e1a0f00e mov pc, lr
- 320: 00008098 muleq r0, r8, r0
- 324: 0000808c andeq r8, r0, ip, lsl #1
- 328: 00000004 andeq r0, r0, r4
+.* <foo>:
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a0f00e mov pc, lr
+ .*: 00008098 muleq r0, r8, r0
+ .*: 0000808c andeq r8, r0, ip, lsl #1
+ .*: 00000004 andeq r0, r0, r4
diff --git a/ld/testsuite/ld-arm/tls-lib.r b/ld/testsuite/ld-arm/tls-lib.r
index cab685e..279b805 100644
--- a/ld/testsuite/ld-arm/tls-lib.r
+++ b/ld/testsuite/ld-arm/tls-lib.r
@@ -3,8 +3,8 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
-000083b0 R_ARM_TLS_DTPMOD32 \*ABS\*
-000083b8 R_ARM_TLS_DTPMOD32 lib_gd
-000083bc R_ARM_TLS_DTPOFF32 lib_gd
+.* R_ARM_TLS_DTPMOD32 \*ABS\*
+.* R_ARM_TLS_DTPMOD32 lib_gd
+.* R_ARM_TLS_DTPOFF32 lib_gd