* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.

    (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.

4 files changed, 227 insertions, 0 deletions

diff --git a/ld/testsuite/ld-tilegx/external.s b/ld/testsuite/ld-tilegx/external.s
new file mode 100644
index 0000000..ab681bc
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/external.s
@@ -0,0 +1,43 @@
+        .text
+        .global external1
+external1: 
+	j external1
+
+        .global external2
+external2:
+	j external1
+
+        .global external_5a
+external_5a = 19
+        .global external_5b
+external_5b = 31
+
+        .global external_8a
+external_8a = 17
+        .global external_8b
+external_8b = 119
+
+        .global external_16a
+external_16a = -32134
+        .global external_16b
+external_16b = 19300
+
+        .global external_32a
+external_32a = 0x12345678
+        .global external_32b
+external_32b = -0x76543210
+
+	.global external_48a
+external_48a = 0x123456789abc
+	.global external_48b
+external_48b = 0x76543210fedc
+
+	.global external_64a
+external_64a = 0x123456789abcdef0
+	.global external_64b
+external_64b = 0xfedcba9876543210
+
+        .data
+
+        .global external_data1
+external_data1:
diff --git a/ld/testsuite/ld-tilegx/reloc.d b/ld/testsuite/ld-tilegx/reloc.d
new file mode 100644
index 0000000..c9acdac
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/reloc.d
@@ -0,0 +1,70 @@
+
+.*:     file format elf64-tilegx.*
+
+Contents of section .text:
+ 100b0 .*
+ 100c0 .*
+ 100d0 .*
+ 100e0 .*
+ 100f0 .*
+ 10100 .*
+ 10110 .*
+ 10120 .*
+ 10130 .*
+ 10140 .*
+ 10150 .*
+ 10160 .*
+ 10170 .*
+ 10180 .*
+ 10190 .*
+ 101a0 .*
+ 101b0 .*
+ 101c0 .*
+Contents of section .data:
+ 201e0 b8010100 c0010100 7a82644b 11773200  .*
+ 201f0 00002e00 2c7a8234 12785634 127856bc  .*
+ 20200 9a341278 56bc9af0 de000000 00000000  .*
+ 20210 00000000 00000000 00000000 00000000  .*
+
+Disassembly of section .text:
+
+00000000000100b0 <_start>:
+   100b0:	[0-9a-f]* 	{ add r2, zero, zero }
+   100b8:	[0-9a-f]* 	{ j 101b8 <external1> }
+   100c0:	[0-9a-f]* 	{ add r3, r2, r2 }
+   100c8:	[0-9a-f]* 	{ beqzt zero, 101c0 <external2> }
+   100d0:	[0-9a-f]* 	{ movei r2, 17 ; movei r3, 119 }
+   100d8:	[0-9a-f]* 	{ movei r2, 17 ; movei r3, 119 ; ld zero, zero }
+   100e0:	[0-9a-f]* 	{ mtspr 17, zero }
+   100e8:	[0-9a-f]* 	{ mfspr zero, 17 }
+   100f0:	[0-9a-f]* 	{ moveli r2, -32134 ; moveli r3, 19300 }
+   100f8:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, -30293 }
+   10100:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, -12816 }
+   10108:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, 30292 }
+   10110:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, 12816 }
+   10118:	[0-9a-f]* 	{ shl16insli r2, r2, -25924 ; shl16insli r3, r3, -292 }
+   10120:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, -292 }
+   10128:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, -17768 }
+   10130:	[0-9a-f]* 	{ shl16insli r2, r2, -25924 ; shl16insli r3, r3, 30292 }
+   10138:	[0-9a-f]* 	{ shl16insli r2, r2, -8464 ; shl16insli r3, r3, 12816 }
+   10140:	[0-9a-f]* 	{ ld_add r0, r0, 17 }
+   10148:	[0-9a-f]* 	{ st_add r0, r0, 17 }
+   10150:	[0-9a-f]* 	{ mm r2, r3, 19, 31 }
+   10158:	[0-9a-f]* 	{ shli r2, r3, 19 ; shli r4, r5, 31 }
+   10160:	[0-9a-f]* 	{ shli r2, r3, 19 ; shli r4, r5, 31 ; ld zero, zero }
+   10168:	[0-9a-f]* 	{ moveli r0, 80 ; moveli r1, 80 }
+   10170:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   10178:	[0-9a-f]* 	{ moveli r0, 168 ; moveli r1, 168 }
+   10180:	[0-9a-f]* 	{ moveli r0, 4096 ; moveli r1, 4096 }
+   10188:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   10190:	[0-9a-f]* 	{ moveli r0, 144 ; moveli r1, 144 }
+   10198:	[0-9a-f]* 	{ moveli r0, 4096 ; moveli r1, 4096 }
+   101a0:	[0-9a-f]* 	{ moveli r0, 0 ; moveli r1, 0 }
+   101a8:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   101b0:	[0-9a-f]* 	{ moveli r0, 112 ; moveli r1, 112 }
+
+00000000000101b8 <external1>:
+   101b8:	[0-9a-f]* 	{ j 101b8 <external1> }
+
+00000000000101c0 <external2>:
+   101c0:	[0-9a-f]* 	{ j 101b8 <external1> }
diff --git a/ld/testsuite/ld-tilegx/reloc.s b/ld/testsuite/ld-tilegx/reloc.s
new file mode 100644
index 0000000..4a19388
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/reloc.s
@@ -0,0 +1,77 @@
+	.text
+	.global _start
+_start:
+	add r2,zero,zero
+	j external1
+
+        add r3,r2,r2
+	beqzt zero,external2
+
+	{ movei r2,external_8a; movei r3,external_8b }
+	{ movei r2,external_8a; movei r3,external_8b; ld zero,zero }
+	{ mtspr external_8a,zero }
+	{ mfspr zero,external_8a }
+	{ moveli r2,external_16a; moveli r3,external_16b }
+
+	{ moveli r2,hw1_last(external_32a); moveli r3,hw1_last(external_32b) }
+	{ shl16insli r2,r2,hw0(external_32a); shl16insli r3,r3,hw0(external_32b) }
+
+	{ moveli r2,hw2_last(external_48a); moveli r3,hw2_last(external_48b) }
+	{ shl16insli r2,r2,hw1(external_48a); shl16insli r3,r3,hw1(external_48b) }
+	{ shl16insli r2,r2,hw0(external_48a); shl16insli r3,r3,hw0(external_48b) }
+
+	{ moveli r2,hw3_last(external_64a); moveli r3,hw3_last(external_64b) }
+	{ shl16insli r2,r2,hw2(external_64a); shl16insli r3,r3,hw2(external_64b) }
+	{ shl16insli r2,r2,hw1(external_64a); shl16insli r3,r3,hw1(external_64b) }
+	{ shl16insli r2,r2,hw0(external_64a); shl16insli r3,r3,hw0(external_64b) }
+
+	{ ld_add r0,r0,external_8a }
+	{ st_add r0,r0,external_8a }
+	{ mm r2,r3,external_5a,external_5b }
+	{ shli r2,r3,external_5a; shli r4,r5,external_5b }
+	{ shli r2,r3,external_5a; shli r4,r5,external_5b; ld zero,zero }
+
+        { moveli r0, external1 - .; moveli r1, external1 - . }
+        { moveli r0, hw1_last(external_data1 - .)
+	  moveli r1, hw1_last(external_data1 - .) }
+        { moveli r0, hw0(external_data1 - .)
+	  moveli r1, hw0(external_data1 - .) }
+        { moveli r0, hw2_last(external_data1 - . + 0x100000000000)
+	  moveli r1, hw2_last(external_data1 - . + 0x100000000000) }
+        { moveli r0, hw1(external_data1      - . + 0x100000000000)
+	  moveli r1, hw1(external_data1      - . + 0x100000000000) }
+        { moveli r0, hw0(external_data1      - . + 0x100000000000)
+	  moveli r1, hw0(external_data1      - . + 0x100000000000) }
+        { moveli r0, hw3_last(external_data1 - . + 0x1000000000000000)
+	  moveli r1, hw3_last(external_data1 - . + 0x1000000000000000) }
+        { moveli r0, hw2(external_data1      - . + 0x1000000000000000)
+	  moveli r1, hw2(external_data1      - . + 0x1000000000000000) }
+        { moveli r0, hw1(external_data1      - . + 0x1000000000000000)
+	  moveli r1, hw1(external_data1      - . + 0x1000000000000000) }
+        { moveli r0, hw0(external_data1      - . + 0x1000000000000000)
+	  moveli r1, hw0(external_data1      - . + 0x1000000000000000) }
+        
+	.data
+	.align 0x20
+	.int external1
+	.int external2
+	.short external_16a, external_16b
+	.byte external_8a, external_8b
+
+	.int (external_data1-.)
+	.short (external_data1-.)
+	.byte (external_data1-.)
+
+	.short hw0_last(external_16a)
+
+	.short hw1_last(external_32a)
+	.short hw0(external_32a)
+
+	.short hw2_last(external_48a)
+	.short hw1(external_48a)
+	.short hw0(external_48a)
+
+	.short hw3(external_64a)
+	.short hw2(external_64a)
+	.short hw1(external_64a)
+	.short hw0(external_64a)
diff --git a/ld/testsuite/ld-tilegx/tilegx.exp b/ld/testsuite/ld-tilegx/tilegx.exp
new file mode 100644
index 0000000..856b41e
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/tilegx.exp
@@ -0,0 +1,37 @@
+# Expect script for TILE-Gx linker tests.
+#   Copyright 2011 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if {!([istarget "tilegx-*-*"]) } {
+    return
+}
+
+# Set up a list as described in ld-lib.exp
+
+set tilepro_tests {
+    {   "tilegx relocation resolution linker test"
+        ""
+        ""
+        { "reloc.s" "external.s" }
+        { {objdump -ds reloc.d} }
+        "reloc"
+    }
+}
+
+run_ld_link_tests $tilepro_tests