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authorAlan Modra <amodra@gmail.com>2011-07-14 03:28:22 +0000
committerAlan Modra <amodra@gmail.com>2011-07-14 03:28:22 +0000
commit9df0ef5fe7ecd8bd8dc591ea3bdb2d3fb089d710 (patch)
treeabefb750fcd256c0732b34ed5f67fe7be4d836f2 /ld/testsuite/ld-powerpc/tlstocso.d
parentfb42df5ed908e2bb9ce52a389981ea8b1c97cdf8 (diff)
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* elf64-ppc.c (struct ppc_link_hash_table): Add plt_static_chain. (build_plt_stub): Add plt_static_chain param, don't load r11 if false. (build_tls_get_addr_stub): Likewise. (ppc_build_one_stub): Update calls to above. (ppc_size_one_stub): Adjust stub size. (ppc64_elf_size_stubs): Add plt_static_chain param, save to htab. * elf64-ppc.h (ppc64_elf_size_stubs): Update prototype. ld/ * emultempl/ppc64elf.em (plt_static_chain): New var. (gld${EMULATION_NAME}_after_allocation): Pass to ppc64_elf_size_stubs. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --plt-static-chain and --no-plt-static-chain. ld/testsuite/ * ld-powerpc/tlsexe.d, * ld-powerpc/tlsexe.g. *ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.d, * ld-powerpc/tlstocso.d: Update for plt stub change.
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlstocso.d')
-rw-r--r--ld/testsuite/ld-powerpc/tlstocso.d10
1 files changed, 5 insertions, 5 deletions
diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d
index 0b84311..cf9cd08 100644
--- a/ld/testsuite/ld-powerpc/tlstocso.d
+++ b/ld/testsuite/ld-powerpc/tlstocso.d
@@ -12,22 +12,21 @@ Disassembly of section \.text:
.* f8 41 00 28 std r2,40\(r1\)
.* e9 62 80 70 ld r11,-32656\(r2\)
.* 7d 69 03 a6 mtctr r11
-.* e9 62 80 80 ld r11,-32640\(r2\)
.* e8 42 80 78 ld r2,-32648\(r2\)
.* 4e 80 04 20 bctr
.* <_start>:
.* 38 62 80 08 addi r3,r2,-32760
-.* 4b ff ff e5 bl .*
+.* 4b ff ff e9 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 18 addi r3,r2,-32744
-.* 4b ff ff d9 bl .*
+.* 4b ff ff dd bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 28 addi r3,r2,-32728
-.* 4b ff ff cd bl .*
+.* 4b ff ff d1 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 38 addi r3,r2,-32712
-.* 4b ff ff c1 bl .*
+.* 4b ff ff c5 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 39 23 80 40 addi r9,r3,-32704
.* 3d 23 00 00 addis r9,r3,0
@@ -39,6 +38,7 @@ Disassembly of section \.text:
.* 89 4d 00 00 lbz r10,0\(r13\)
.* 3d 2d 00 00 addis r9,r13,0
.* 99 49 00 00 stb r10,0\(r9\)
+.* 60 00 00 00 nop
.* 00 00 00 00 .*
.* 00 01 02 18 .*
.* <__glink_PLTresolve>: