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authorAlan Modra <amodra@gmail.com>2004-03-16 00:58:43 +0000
committerAlan Modra <amodra@gmail.com>2004-03-16 00:58:43 +0000
commitfdd12ef3c60c2364704896d94d56cb269396b0f3 (patch)
treeca0ef43f11147179fa554832f7465d4c16d64b00 /ld/testsuite/ld-powerpc/tlsso32.d
parent1d39f3299631af4b58eb450f2a3d702fdda2c803 (diff)
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opcodes/
* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/.
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsso32.d')
-rw-r--r--ld/testsuite/ld-powerpc/tlsso32.d56
1 files changed, 28 insertions, 28 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsso32.d b/ld/testsuite/ld-powerpc/tlsso32.d
index 1e9ba31..3cf6a76 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.d
+++ b/ld/testsuite/ld-powerpc/tlsso32.d
@@ -9,34 +9,34 @@
Disassembly of section \.text:
0+538 <_start>:
- 538: 38 7f 00 1c addi r3,r31,28
- 53c: 48 00 00 01 bl 53c .*
- 540: 38 7f 00 0c addi r3,r31,12
- 544: 48 00 00 01 bl 544 .*
- 548: 38 7f 00 24 addi r3,r31,36
- 54c: 48 01 01 95 bl 106e0 .*
- 550: 38 7f 00 0c addi r3,r31,12
- 554: 48 01 01 8d bl 106e0 .*
- 558: 39 23 80 20 addi r9,r3,-32736
- 55c: 3d 23 00 00 addis r9,r3,0
- 560: 81 49 80 24 lwz r10,-32732\(r9\)
- 564: 81 3f 00 2c lwz r9,44\(r31\)
- 568: 7d 49 12 2e lhzx r10,r9,r2
- 56c: 89 42 00 00 lbz r10,0\(r2\)
- 570: 3d 22 00 00 addis r9,r2,0
- 574: 99 49 00 00 stb r10,0\(r9\)
- 578: 38 7e 00 14 addi r3,r30,20
- 57c: 48 00 00 01 bl 57c .*
- 580: 38 7e 00 0c addi r3,r30,12
- 584: 48 00 00 01 bl 584 .*
- 588: 91 43 80 04 stw r10,-32764\(r3\)
- 58c: 3d 23 00 00 addis r9,r3,0
- 590: 91 49 80 08 stw r10,-32760\(r9\)
- 594: 81 3e 00 2c lwz r9,44\(r30\)
- 598: 7d 49 13 2e sthx r10,r9,r2
- 59c: a1 42 00 00 lhz r10,0\(r2\)
- 5a0: 3d 22 00 00 addis r9,r2,0
- 5a4: a9 49 00 00 lha r10,0\(r9\)
+ 538: 38 7f 00 1c addi r3,r31,28
+ 53c: 48 00 00 01 bl 53c .*
+ 540: 38 7f 00 0c addi r3,r31,12
+ 544: 48 00 00 01 bl 544 .*
+ 548: 38 7f 00 24 addi r3,r31,36
+ 54c: 48 01 01 95 bl 106e0 .*
+ 550: 38 7f 00 0c addi r3,r31,12
+ 554: 48 01 01 8d bl 106e0 .*
+ 558: 39 23 80 20 addi r9,r3,-32736
+ 55c: 3d 23 00 00 addis r9,r3,0
+ 560: 81 49 80 24 lwz r10,-32732\(r9\)
+ 564: 81 3f 00 2c lwz r9,44\(r31\)
+ 568: 7d 49 12 2e lhzx r10,r9,r2
+ 56c: 89 42 00 00 lbz r10,0\(r2\)
+ 570: 3d 22 00 00 addis r9,r2,0
+ 574: 99 49 00 00 stb r10,0\(r9\)
+ 578: 38 7e 00 14 addi r3,r30,20
+ 57c: 48 00 00 01 bl 57c .*
+ 580: 38 7e 00 0c addi r3,r30,12
+ 584: 48 00 00 01 bl 584 .*
+ 588: 91 43 80 04 stw r10,-32764\(r3\)
+ 58c: 3d 23 00 00 addis r9,r3,0
+ 590: 91 49 80 08 stw r10,-32760\(r9\)
+ 594: 81 3e 00 2c lwz r9,44\(r30\)
+ 598: 7d 49 13 2e sthx r10,r9,r2
+ 59c: a1 42 00 00 lhz r10,0\(r2\)
+ 5a0: 3d 22 00 00 addis r9,r2,0
+ 5a4: a9 49 00 00 lha r10,0\(r9\)
Disassembly of section \.got:
00010664 <\.got>: