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authorAlan Modra <amodra@gmail.com>2017-08-30 20:35:35 +0930
committerAlan Modra <amodra@gmail.com>2017-08-30 20:43:31 +0930
commit9a23f96e919ba91587d077b1d399246dde4002dd (patch)
tree1eb693e16708eef776aece4643cda8dfde86301c /ld/testsuite/ld-powerpc/tlsmark.d
parentb9f04fe0dfe64bc6224e7bb96378607f17da7446 (diff)
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PowerPC TPREL16_HA/LO reloc optimization
In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsmark.d')
-rw-r--r--ld/testsuite/ld-powerpc/tlsmark.d16
1 files changed, 8 insertions, 8 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsmark.d b/ld/testsuite/ld-powerpc/tlsmark.d
index 720a31f..7e10074 100644
--- a/ld/testsuite/ld-powerpc/tlsmark.d
+++ b/ld/testsuite/ld-powerpc/tlsmark.d
@@ -11,25 +11,25 @@ Disassembly of section \.text:
0+100000e8 <_start>:
.*: (48 00 00 18|18 00 00 48) b 10000100 <_start\+0x18>
-.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
+.*: (38 6d 90 00|00 90 6d 38) addi r3,r13,-28672
.*: (60 00 00 00|00 00 00 60) nop
.*: (e8 83 00 00|00 00 83 e8) ld r4,0\(r3\)
-.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
+.*: (60 00 00 00|00 00 00 60) nop
.*: (48 00 00 0c|0c 00 00 48) b 10000108 <_start\+0x20>
-.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
+.*: (60 00 00 00|00 00 00 60) nop
.*: (4b ff ff e8|e8 ff ff 4b) b 100000ec <_start\+0x4>
-.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
+.*: (38 6d 10 00|00 10 6d 38) addi r3,r13,4096
.*: (60 00 00 00|00 00 00 60) nop
.*: (e8 83 80 00|00 80 83 e8) ld r4,-32768\(r3\)
-.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
+.*: (60 00 00 00|00 00 00 60) nop
.*: (48 00 00 0c|0c 00 00 48) b 10000124 <_start\+0x3c>
-.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
+.*: (60 00 00 00|00 00 00 60) nop
.*: (48 00 00 14|14 00 00 48) b 10000134 <_start\+0x4c>
-.*: (38 63 90 04|04 90 63 38) addi r3,r3,-28668
+.*: (38 6d 90 04|04 90 6d 38) addi r3,r13,-28668
.*: (60 00 00 00|00 00 00 60) nop
.*: (e8 a3 00 00|00 00 a3 e8) ld r5,0\(r3\)
.*: (4b ff ff ec|ec ff ff 4b) b 1000011c <_start\+0x34>
-.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
+.*: (38 6d 10 00|00 10 6d 38) addi r3,r13,4096
.*: (60 00 00 00|00 00 00 60) nop
.*: (e8 a3 80 04|04 80 a3 e8) ld r5,-32764\(r3\)