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author | Alan Modra <amodra@gmail.com> | 2017-08-30 20:35:35 +0930 |
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committer | Alan Modra <amodra@gmail.com> | 2017-08-30 20:43:31 +0930 |
commit | 9a23f96e919ba91587d077b1d399246dde4002dd (patch) | |
tree | 1eb693e16708eef776aece4643cda8dfde86301c /ld/testsuite/ld-powerpc/tlsexetoc.d | |
parent | b9f04fe0dfe64bc6224e7bb96378607f17da7446 (diff) | |
download | gdb-9a23f96e919ba91587d077b1d399246dde4002dd.zip gdb-9a23f96e919ba91587d077b1d399246dde4002dd.tar.gz gdb-9a23f96e919ba91587d077b1d399246dde4002dd.tar.bz2 |
PowerPC TPREL16_HA/LO reloc optimization
In the TLS GD/LD to LE optimization, ld replaces a sequence like
addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
nop
with
addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x
addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x
nop
When the tprel offset is small, this can be further optimized to
nop
addi 3,13,x@tprel
nop
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt.
(ppc64_elf_tls_optimize): Set it.
(ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when
addis would add zero.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt.
(ppc_elf_tls_optimize): Set it.
(ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO relocs to use r2 when addis would add zero.
gold/
* powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on
TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS
relocs to use r2/r13 when addis would add zero.
ld/
* testsuite/ld-powerpc/tls.s: Add calls with tls markers.
* testsuite/ld-powerpc/tls32.s: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Run tls marker tests.
* testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization.
* testsuite/ld-powerpc/tlsexe.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
* testsuite/ld-powerpc/tlsmark.d: Likewise.
* testsuite/ld-powerpc/tlsopt4.d: Likewise.
* testsuite/ld-powerpc/tlstoc.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsexetoc.d')
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsexetoc.d | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d index 5f2e8b4..d216a2a 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.d +++ b/ld/testsuite/ld-powerpc/tlsexetoc.d @@ -35,22 +35,22 @@ Disassembly of section \.text: .* (38 62 80 18|18 80 62 38) addi r3,r2,-32744 .* (4b ff ff a9|a9 ff ff 4b) bl .* .* (60 00 00 00|00 00 00 60) nop -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 90 38|38 90 63 38) addi r3,r3,-28616 .* (60 00 00 00|00 00 00 60) nop -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 10 00|00 10 63 38) addi r3,r3,4096 +.* (38 6d 90 38|38 90 6d 38) addi r3,r13,-28616 +.* (60 00 00 00|00 00 00 60) nop +.* (60 00 00 00|00 00 00 60) nop +.* (38 6d 10 00|00 10 6d 38) addi r3,r13,4096 .* (60 00 00 00|00 00 00 60) nop .* (39 23 80 40|40 80 23 39) addi r9,r3,-32704 .* (3d 23 00 00|00 00 23 3d) addis r9,r3,0 .* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\) .* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\) .* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3 -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (a1 49 90 58|58 90 49 a1) lhz r10,-28584\(r9\) +.* (60 00 00 00|00 00 00 60) nop +.* (a1 4d 90 58|58 90 4d a1) lhz r10,-28584\(r13\) .* (89 4d 90 60|60 90 4d 89) lbz r10,-28576\(r13\) -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (99 49 90 68|68 90 49 99) stb r10,-28568\(r9\) +.* (60 00 00 00|00 00 00 60) nop +.* (99 4d 90 68|68 90 4d 99) stb r10,-28568\(r13\) .* (00 00 00 00|68 02 01 00) .* .* (00 01 02 68|00 00 00 00) .* .* <__glink_PLTresolve>: |