aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite/ld-frv/fdpic-shared-8.d
diff options
context:
space:
mode:
authorAlexandre Oliva <aoliva@redhat.com>2004-06-21 14:45:42 +0000
committerAlexandre Oliva <aoliva@redhat.com>2004-06-21 14:45:42 +0000
commitaee6f5b4bd1c978694bede743979c0c4f560d46b (patch)
treea185bf850c2fe9563a1fbf0a89a5c6b981cddbe4 /ld/testsuite/ld-frv/fdpic-shared-8.d
parent05576f107c90440f15fa8a03e009c3f541af0b75 (diff)
downloadgdb-aee6f5b4bd1c978694bede743979c0c4f560d46b.zip
gdb-aee6f5b4bd1c978694bede743979c0c4f560d46b.tar.gz
gdb-aee6f5b4bd1c978694bede743979c0c4f560d46b.tar.bz2
bfd/ChangeLog:
* elf-bfd.h (struct elf_backend_data): Added elf_backend_omit_section_dynsym. (_bfd_elf_link_omit_section_dynsym): Declare. * elf32-frv.c (_frvfdpic_link_omit_section_dynsym): New. (elf_backend_omit_section_dynsym): Use it for frvfdpic. * elflink.c (_bfd_elf_link_omit_section_dynsym): Split out of... (_bfd_elf_link_renumber_dynsyms): ... this function. * elfxx-target.h (elf_backend_omit_section_dynsym): Default to _bfd_elf_link_omit_section_dynsym). (elfNN_bed): Added elf_backend_omit_section_dynsym. ld/ChangeLog: * emulparams/elf32frvfd.sh (GENERATE_PIE_SCRIPT): Set to yes. ld/testsuite/ChangeLog: * ld-frv/fdpic-pie-1.d: Adjust for pie-specific link script. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-frv/fdpic-shared-8.d')
-rw-r--r--ld/testsuite/ld-frv/fdpic-shared-8.d132
1 files changed, 66 insertions, 66 deletions
diff --git a/ld/testsuite/ld-frv/fdpic-shared-8.d b/ld/testsuite/ld-frv/fdpic-shared-8.d
index 26a5925..a546165 100644
--- a/ld/testsuite/ld-frv/fdpic-shared-8.d
+++ b/ld/testsuite/ld-frv/fdpic-shared-8.d
@@ -8,77 +8,77 @@
Disassembly of section \.text:
-000004d4 <F8>:
- 4d4: 80 3c 00 02 call 4dc <GF1\+0x4>
+00000434 <F8>:
+ 434: 80 3c 00 02 call 43c <GF1\+0x4>
-000004d8 <GF1>:
- 4d8: 80 40 f0 10 addi gr15,16,gr0
- 4dc: 80 fc 00 14 setlos 0x14,gr0
- 4e0: 80 f4 00 24 setlo 0x24,gr0
- 4e4: 80 f8 00 00 sethi hi\(0x0\),gr0
- 4e8: 80 40 f0 0c addi gr15,12,gr0
- 4ec: 80 fc 00 1c setlos 0x1c,gr0
- 4f0: 80 f4 00 18 setlo 0x18,gr0
- 4f4: 80 f8 00 00 sethi hi\(0x0\),gr0
- 4f8: 80 40 ff f8 addi gr15,-8,gr0
- 4fc: 80 fc ff f0 setlos 0xfffffff0,gr0
- 500: 80 f4 ff c8 setlo 0xffc8,gr0
- 504: 80 f8 ff ff sethi 0xffff,gr0
- 508: 80 40 ff 4c addi gr15,-180,gr0
- 50c: 80 fc ff 4c setlos 0xffffff4c,gr0
- 510: 80 f4 ff 4c setlo 0xff4c,gr0
- 514: 80 f8 ff ff sethi 0xffff,gr0
- 518: 80 f4 00 20 setlo 0x20,gr0
- 51c: 80 f8 00 00 sethi hi\(0x0\),gr0
+00000438 <GF1>:
+ 438: 80 40 f0 10 addi gr15,16,gr0
+ 43c: 80 fc 00 14 setlos 0x14,gr0
+ 440: 80 f4 00 24 setlo 0x24,gr0
+ 444: 80 f8 00 00 sethi hi\(0x0\),gr0
+ 448: 80 40 f0 0c addi gr15,12,gr0
+ 44c: 80 fc 00 1c setlos 0x1c,gr0
+ 450: 80 f4 00 18 setlo 0x18,gr0
+ 454: 80 f8 00 00 sethi hi\(0x0\),gr0
+ 458: 80 40 ff f8 addi gr15,-8,gr0
+ 45c: 80 fc ff f0 setlos 0xfffffff0,gr0
+ 460: 80 f4 ff c8 setlo 0xffc8,gr0
+ 464: 80 f8 ff ff sethi 0xffff,gr0
+ 468: 80 40 ff c4 addi gr15,-60,gr0
+ 46c: 80 fc ff c4 setlos 0xffffffc4,gr0
+ 470: 80 f4 ff c4 setlo 0xffc4,gr0
+ 474: 80 f8 ff ff sethi 0xffff,gr0
+ 478: 80 f4 00 20 setlo 0x20,gr0
+ 47c: 80 f8 00 00 sethi hi\(0x0\),gr0
Disassembly of section \.data:
-00004524 <D8>:
- 4524: 00 00 00 04 add\.p gr0,gr4,gr0
- 4524: R_FRV_32 GD0
+000044fc <D8>:
+ 44fc: 00 00 00 04 add\.p gr0,gr4,gr0
+ 44fc: R_FRV_32 GD0
-00004528 <GD0>:
- 4528: 00 00 00 10 add\.p gr0,gr16,gr0
- 4528: R_FRV_32 \.got
- 452c: 00 00 00 08 add\.p gr0,gr8,gr0
- 452c: R_FRV_32 \.text
+00004500 <GD0>:
+ 4500: 00 00 00 10 add\.p gr0,gr16,gr0
+ 4500: R_FRV_32 \.got
+ 4504: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4504: R_FRV_32 \.text
Disassembly of section \.got:
-000045a8 <_GLOBAL_OFFSET_TABLE_-0x38>:
- 45a8: 00 00 00 08 add\.p gr0,gr8,gr0
- 45a8: R_FRV_FUNCDESC_VALUE \.text
- 45ac: 00 00 00 00 add\.p gr0,gr0,gr0
- 45b0: 00 00 00 08 add\.p gr0,gr8,gr0
- 45b0: R_FRV_FUNCDESC_VALUE \.text
- 45b4: 00 00 00 00 add\.p gr0,gr0,gr0
- 45b8: 00 00 00 08 add\.p gr0,gr8,gr0
- 45b8: R_FRV_FUNCDESC_VALUE \.text
- 45bc: 00 00 00 00 add\.p gr0,gr0,gr0
- 45c0: 00 00 00 08 add\.p gr0,gr8,gr0
- 45c0: R_FRV_FUNCDESC_VALUE \.text
- 45c4: 00 00 00 00 add\.p gr0,gr0,gr0
- 45c8: 00 00 00 08 add\.p gr0,gr8,gr0
- 45c8: R_FRV_FUNCDESC_VALUE \.text
- 45cc: 00 00 00 00 add\.p gr0,gr0,gr0
- 45d0: 00 00 00 08 add\.p gr0,gr8,gr0
- 45d0: R_FRV_FUNCDESC_VALUE \.text
- 45d4: 00 00 00 00 add\.p gr0,gr0,gr0
- 45d8: 00 00 00 08 add\.p gr0,gr8,gr0
- 45d8: R_FRV_FUNCDESC_VALUE \.text
- 45dc: 00 00 00 00 add\.p gr0,gr0,gr0
+00004508 <_GLOBAL_OFFSET_TABLE_-0x38>:
+ 4508: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4508: R_FRV_FUNCDESC_VALUE \.text
+ 450c: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4510: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4510: R_FRV_FUNCDESC_VALUE \.text
+ 4514: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4518: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4518: R_FRV_FUNCDESC_VALUE \.text
+ 451c: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4520: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4520: R_FRV_FUNCDESC_VALUE \.text
+ 4524: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4528: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4528: R_FRV_FUNCDESC_VALUE \.text
+ 452c: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4530: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4530: R_FRV_FUNCDESC_VALUE \.text
+ 4534: 00 00 00 00 add\.p gr0,gr0,gr0
+ 4538: 00 00 00 08 add\.p gr0,gr8,gr0
+ 4538: R_FRV_FUNCDESC_VALUE \.text
+ 453c: 00 00 00 00 add\.p gr0,gr0,gr0
-000045e0 <_GLOBAL_OFFSET_TABLE_>:
+00004540 <_GLOBAL_OFFSET_TABLE_>:
\.\.\.
- 45ec: 00 00 00 08 add\.p gr0,gr8,gr0
- 45ec: R_FRV_32 \.got
- 45f0: 00 00 00 04 add\.p gr0,gr4,gr0
- 45f0: R_FRV_32 GF1
- 45f4: 00 00 00 04 add\.p gr0,gr4,gr0
- 45f4: R_FRV_32 GF2
- 45f8: 00 00 00 20 add\.p gr0,gr32,gr0
- 45f8: R_FRV_32 \.got
- 45fc: 00 00 00 18 add\.p gr0,gr24,gr0
- 45fc: R_FRV_32 \.got
- 4600: 00 00 00 04 add\.p gr0,gr4,gr0
- 4600: R_FRV_32 GD4
- 4604: 00 00 00 04 add\.p gr0,gr4,gr0
- 4604: R_FRV_32 GF3
+ 454c: 00 00 00 08 add\.p gr0,gr8,gr0
+ 454c: R_FRV_32 \.got
+ 4550: 00 00 00 04 add\.p gr0,gr4,gr0
+ 4550: R_FRV_32 GF1
+ 4554: 00 00 00 04 add\.p gr0,gr4,gr0
+ 4554: R_FRV_32 GF2
+ 4558: 00 00 00 20 add\.p gr0,gr32,gr0
+ 4558: R_FRV_32 \.got
+ 455c: 00 00 00 18 add\.p gr0,gr24,gr0
+ 455c: R_FRV_32 \.got
+ 4560: 00 00 00 04 add\.p gr0,gr4,gr0
+ 4560: R_FRV_32 GD4
+ 4564: 00 00 00 04 add\.p gr0,gr4,gr0
+ 4564: R_FRV_32 GF3