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author | Alexandre Oliva <aoliva@redhat.com> | 2004-01-06 19:19:31 +0000 |
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committer | Alexandre Oliva <aoliva@redhat.com> | 2004-01-06 19:19:31 +0000 |
commit | a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8 (patch) | |
tree | 8f3a89fdabd061a6458105d1c5ef62503f5d5def /ld/testsuite/ld-frv/fdpic-shared-8.d | |
parent | 99d09cdbd43bd0ebc6079dba91d8a71dc12ee45e (diff) | |
download | gdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.zip gdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.tar.gz gdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.tar.bz2 |
* ld-frv: Update .d files with correct addresses displayed for
dynamic relocations.
2003-12-02 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic1.s (.D0): Move to separate data section.
2003-11-28 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
* ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Update to
reflect EMBEDDED= change in linker script.
2003-11-27 Alexandre Oliva <aoliva@redhat.com>
* ld-frv: Update .d files to reflect changes in the page size, the
addition of a stack segment, the use of a NULL function descriptor
for weakundef functions and the change in the lazy funcdesc_value
in-place addend value.
2003-11-05 Alexandre Oliva <aoliva@redhat.com>
* lib/ld-lib.exp (is_elf_format): Match frv-uclinux.
2003-10-06 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Addresses are
now _gp-based, not .rofixup-based.
* ld-frv/fdpic-static-6.d: Likewise. Match warning about
relocation to different section.
2003-09-30 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic.exp: Add -melf32frvfd to LDFLAGS.
2003-09-19 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic7.s, ld-frv/fdpic-static-7.d, ld-frv/fdpic-pie-7.d,
ld-frv/fdpic-shared-7.d: New.
* ld-frv/fdpic8.s, ld-frv/fdpic-static-8.d, ld-frv/fdpic-pie-8.d,
ld-frv/fdpic-shared-8.d: New.
* ld-frv/fdpic-pie-8-fail.d, ld-frv/fdpic-shared-8-fail.d: New.
* ld-frv/fdpic.exp: Run them.
* ld-frv/fdpic8.ldv, ld-frv/fdpic8min.ldv: New.
2003-09-18 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/fdpic5.s, ld-frv/fdpic-static-5.d, ld-frv/fdpic-pie-5.d,
ld-frv/fdpic-shared-5.d: New.
* ld-frv/fdpic6.s, ld-frv/fdpic-static-6.d, ld-frv/fdpic-pie-6.d,
ld-frv/fdpic-shared-6.d: New.
* ld-frv/fdpic.exp: Run them.
* ld-frv/fdpic*.d: Add -mfdpic to assembler flags. Updated.
* ld-frv/fdpic2min.ldv: New, used by fdpic-shared-2.d.
* ld-frv/fdpic-shared-2-fail.d: New.
* ld-frv/fdpic.exp: Run it.
* ld-frv/fdpic4.s, ld-frv/fdpic-shared-4.d: New.
* ld-frv/fdpic.exp: Add new test.
* ld-frv/fdpic-pie-2.d: Remove unnecessary function descriptors.
* ld-frv/fdpic-shared-local-2.d, ld-frv/fdpic2.ldv: New.
* ld-frv/fdpic3.s, ld-frv/fdpic-shared-3.d: New.
* ld-frv/fdpic.exp: Add new tests.
* ld-frv/fdpic.exp, ld-frv/fdpic1.s, ld-frv/fdpic2.s,
* ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
* ld-frv/fdpic-pie-1.d, ld-frv/fdpic-pie-2.d,
* ld-frv/fdpic-shared-1.d, ld-frv/fdpic-shared-2.d: Renamed from
ucpic.
2003-09-15 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/ucpic.exp, ld-frv/ucpic1.s, ld-frv/ucpic2.s: New.
* ld-frv/ucpic-static-1.d, ld-frv/ucpic-static-2.d: New.
* ld-frv/ucpic-pie-1.d, ld-frv/ucpic-pie-2.d: New.
* ld-frv/ucpic-shared-1.d, ld-frv/ucpic-shared-2.d: New.
Diffstat (limited to 'ld/testsuite/ld-frv/fdpic-shared-8.d')
-rw-r--r-- | ld/testsuite/ld-frv/fdpic-shared-8.d | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/ld/testsuite/ld-frv/fdpic-shared-8.d b/ld/testsuite/ld-frv/fdpic-shared-8.d new file mode 100644 index 0000000..fdeea73 --- /dev/null +++ b/ld/testsuite/ld-frv/fdpic-shared-8.d @@ -0,0 +1,84 @@ +#name: FRV uClinux PIC relocs to (mostly) global symbols with addends, shared linking +#source: fdpic8.s +#objdump: -DR -j .text -j .data -j .got -j .plt +#as: -mfdpic +#ld: -shared --version-script fdpic8min.ldv + +.*: file format elf.*frv.* + +Disassembly of section \.text: + +000004d4 <F8>: + 4d4: 80 3c 00 02 call 4dc <GF1\+0x4> + +000004d8 <GF1>: + 4d8: 80 40 f0 10 addi gr15,16,gr0 + 4dc: 80 fc 00 14 setlos 0x14,gr0 + 4e0: 80 f4 00 24 setlo 0x24,gr0 + 4e4: 80 f8 00 00 sethi hi\(0x0\),gr0 + 4e8: 80 40 f0 0c addi gr15,12,gr0 + 4ec: 80 fc 00 1c setlos 0x1c,gr0 + 4f0: 80 f4 00 18 setlo 0x18,gr0 + 4f4: 80 f8 00 00 sethi hi\(0x0\),gr0 + 4f8: 80 40 ff f8 addi gr15,-8,gr0 + 4fc: 80 fc ff f0 setlos 0xfffffff0,gr0 + 500: 80 f4 ff c8 setlo 0xffc8,gr0 + 504: 80 f8 ff ff sethi 0xffff,gr0 + 508: 80 40 ff 4c addi gr15,-180,gr0 + 50c: 80 fc ff 4c setlos 0xffffff4c,gr0 + 510: 80 f4 ff 4c setlo 0xff4c,gr0 + 514: 80 f8 ff ff sethi 0xffff,gr0 + 518: 80 f4 00 20 setlo 0x20,gr0 + 51c: 80 f8 00 00 sethi hi\(0x0\),gr0 +Disassembly of section \.data: + +00010524 <D8>: + 10524: 00 00 00 04 add\.p gr0,gr4,gr0 + 10524: R_FRV_32 GD0 + +00010528 <GD0>: + 10528: 00 00 00 10 add\.p gr0,gr16,gr0 + 10528: R_FRV_32 \.got + 1052c: 00 00 00 08 add\.p gr0,gr8,gr0 + 1052c: R_FRV_32 \.text +Disassembly of section \.got: + +000105a8 <_GLOBAL_OFFSET_TABLE_-0x38>: + 105a8: 00 00 00 08 add\.p gr0,gr8,gr0 + 105a8: R_FRV_FUNCDESC_VALUE \.text + 105ac: 00 00 00 00 add\.p gr0,gr0,gr0 + 105b0: 00 00 00 08 add\.p gr0,gr8,gr0 + 105b0: R_FRV_FUNCDESC_VALUE \.text + 105b4: 00 00 00 00 add\.p gr0,gr0,gr0 + 105b8: 00 00 00 08 add\.p gr0,gr8,gr0 + 105b8: R_FRV_FUNCDESC_VALUE \.text + 105bc: 00 00 00 00 add\.p gr0,gr0,gr0 + 105c0: 00 00 00 08 add\.p gr0,gr8,gr0 + 105c0: R_FRV_FUNCDESC_VALUE \.text + 105c4: 00 00 00 00 add\.p gr0,gr0,gr0 + 105c8: 00 00 00 08 add\.p gr0,gr8,gr0 + 105c8: R_FRV_FUNCDESC_VALUE \.text + 105cc: 00 00 00 00 add\.p gr0,gr0,gr0 + 105d0: 00 00 00 08 add\.p gr0,gr8,gr0 + 105d0: R_FRV_FUNCDESC_VALUE \.text + 105d4: 00 00 00 00 add\.p gr0,gr0,gr0 + 105d8: 00 00 00 08 add\.p gr0,gr8,gr0 + 105d8: R_FRV_FUNCDESC_VALUE \.text + 105dc: 00 00 00 00 add\.p gr0,gr0,gr0 + +000105e0 <_GLOBAL_OFFSET_TABLE_>: + \.\.\. + 105ec: 00 00 00 08 add\.p gr0,gr8,gr0 + 105ec: R_FRV_32 \.got + 105f0: 00 00 00 04 add\.p gr0,gr4,gr0 + 105f0: R_FRV_32 GF1 + 105f4: 00 00 00 04 add\.p gr0,gr4,gr0 + 105f4: R_FRV_32 GF2 + 105f8: 00 00 00 20 add\.p gr0,gr32,gr0 + 105f8: R_FRV_32 \.got + 105fc: 00 00 00 18 add\.p gr0,gr24,gr0 + 105fc: R_FRV_32 \.got + 10600: 00 00 00 04 add\.p gr0,gr4,gr0 + 10600: R_FRV_32 GD4 + 10604: 00 00 00 04 add\.p gr0,gr4,gr0 + 10604: R_FRV_32 GF3 |