aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite/ld-frv/fdpic-shared-5.d
diff options
context:
space:
mode:
authorAlexandre Oliva <aoliva@redhat.com>2004-01-06 19:19:31 +0000
committerAlexandre Oliva <aoliva@redhat.com>2004-01-06 19:19:31 +0000
commita9a704fc4e60bc60d9c54f99f325adfdb2efe5f8 (patch)
tree8f3a89fdabd061a6458105d1c5ef62503f5d5def /ld/testsuite/ld-frv/fdpic-shared-5.d
parent99d09cdbd43bd0ebc6079dba91d8a71dc12ee45e (diff)
downloadgdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.zip
gdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.tar.gz
gdb-a9a704fc4e60bc60d9c54f99f325adfdb2efe5f8.tar.bz2
* ld-frv: Update .d files with correct addresses displayed for
dynamic relocations. 2003-12-02 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic1.s (.D0): Move to separate data section. 2003-11-28 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d, * ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Update to reflect EMBEDDED= change in linker script. 2003-11-27 Alexandre Oliva <aoliva@redhat.com> * ld-frv: Update .d files to reflect changes in the page size, the addition of a stack segment, the use of a NULL function descriptor for weakundef functions and the change in the lazy funcdesc_value in-place addend value. 2003-11-05 Alexandre Oliva <aoliva@redhat.com> * lib/ld-lib.exp (is_elf_format): Match frv-uclinux. 2003-10-06 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d, ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Addresses are now _gp-based, not .rofixup-based. * ld-frv/fdpic-static-6.d: Likewise. Match warning about relocation to different section. 2003-09-30 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic.exp: Add -melf32frvfd to LDFLAGS. 2003-09-19 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic7.s, ld-frv/fdpic-static-7.d, ld-frv/fdpic-pie-7.d, ld-frv/fdpic-shared-7.d: New. * ld-frv/fdpic8.s, ld-frv/fdpic-static-8.d, ld-frv/fdpic-pie-8.d, ld-frv/fdpic-shared-8.d: New. * ld-frv/fdpic-pie-8-fail.d, ld-frv/fdpic-shared-8-fail.d: New. * ld-frv/fdpic.exp: Run them. * ld-frv/fdpic8.ldv, ld-frv/fdpic8min.ldv: New. 2003-09-18 Alexandre Oliva <aoliva@redhat.com> * ld-frv/fdpic5.s, ld-frv/fdpic-static-5.d, ld-frv/fdpic-pie-5.d, ld-frv/fdpic-shared-5.d: New. * ld-frv/fdpic6.s, ld-frv/fdpic-static-6.d, ld-frv/fdpic-pie-6.d, ld-frv/fdpic-shared-6.d: New. * ld-frv/fdpic.exp: Run them. * ld-frv/fdpic*.d: Add -mfdpic to assembler flags. Updated. * ld-frv/fdpic2min.ldv: New, used by fdpic-shared-2.d. * ld-frv/fdpic-shared-2-fail.d: New. * ld-frv/fdpic.exp: Run it. * ld-frv/fdpic4.s, ld-frv/fdpic-shared-4.d: New. * ld-frv/fdpic.exp: Add new test. * ld-frv/fdpic-pie-2.d: Remove unnecessary function descriptors. * ld-frv/fdpic-shared-local-2.d, ld-frv/fdpic2.ldv: New. * ld-frv/fdpic3.s, ld-frv/fdpic-shared-3.d: New. * ld-frv/fdpic.exp: Add new tests. * ld-frv/fdpic.exp, ld-frv/fdpic1.s, ld-frv/fdpic2.s, * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d, * ld-frv/fdpic-pie-1.d, ld-frv/fdpic-pie-2.d, * ld-frv/fdpic-shared-1.d, ld-frv/fdpic-shared-2.d: Renamed from ucpic. 2003-09-15 Alexandre Oliva <aoliva@redhat.com> * ld-frv/ucpic.exp, ld-frv/ucpic1.s, ld-frv/ucpic2.s: New. * ld-frv/ucpic-static-1.d, ld-frv/ucpic-static-2.d: New. * ld-frv/ucpic-pie-1.d, ld-frv/ucpic-pie-2.d: New. * ld-frv/ucpic-shared-1.d, ld-frv/ucpic-shared-2.d: New.
Diffstat (limited to 'ld/testsuite/ld-frv/fdpic-shared-5.d')
-rw-r--r--ld/testsuite/ld-frv/fdpic-shared-5.d83
1 files changed, 83 insertions, 0 deletions
diff --git a/ld/testsuite/ld-frv/fdpic-shared-5.d b/ld/testsuite/ld-frv/fdpic-shared-5.d
new file mode 100644
index 0000000..d0767f6
--- /dev/null
+++ b/ld/testsuite/ld-frv/fdpic-shared-5.d
@@ -0,0 +1,83 @@
+#name: FRV uClinux PIC relocs to undefined symbols, shared linking
+#source: fdpic5.s
+#objdump: -DRz -j .text -j .data -j .got -j .plt
+#as: -mfdpic
+#ld: -shared
+
+.*: file format elf.*frv.*
+
+Disassembly of section \.plt:
+
+00000598 <\.plt>:
+ 598: 00 00 00 10 add\.p gr0,gr16,gr0
+ 59c: c0 1a 00 06 bra 5b4 <F5-0x10>
+ 5a0: 00 00 00 08 add\.p gr0,gr8,gr0
+ 5a4: c0 1a 00 04 bra 5b4 <F5-0x10>
+ 5a8: 00 00 00 00 add\.p gr0,gr0,gr0
+ 5ac: c0 1a 00 02 bra 5b4 <F5-0x10>
+ 5b0: 00 00 00 18 add\.p gr0,gr24,gr0
+ 5b4: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
+ 5b8: 80 30 40 00 jmpl @\(gr4,gr0\)
+ 5bc: 9c cc ff f0 lddi @\(gr15,-16\),gr14
+ 5c0: 80 30 e0 00 jmpl @\(gr14,gr0\)
+Disassembly of section \.text:
+
+000005c4 <F5>:
+ 5c4: fe 3f ff fe call 5bc <F5-0x8>
+ 5c8: 80 40 f0 0c addi gr15,12,gr0
+ 5cc: 80 fc 00 24 setlos 0x24,gr0
+ 5d0: 80 f4 00 20 setlo 0x20,gr0
+ 5d4: 80 f8 00 00 sethi hi\(0x0\),gr0
+ 5d8: 80 40 f0 10 addi gr15,16,gr0
+ 5dc: 80 fc 00 1c setlos 0x1c,gr0
+ 5e0: 80 f4 00 18 setlo 0x18,gr0
+ 5e4: 80 f8 00 00 sethi hi\(0x0\),gr0
+ 5e8: 80 40 ff f8 addi gr15,-8,gr0
+ 5ec: 80 fc ff e8 setlos 0xffffffe8,gr0
+ 5f0: 80 f4 ff e0 setlo 0xffe0,gr0
+ 5f4: 80 f8 ff ff sethi 0xffff,gr0
+ 5f8: 80 f4 00 14 setlo 0x14,gr0
+ 5fc: 80 f8 00 00 sethi hi\(0x0\),gr0
+Disassembly of section \.data:
+
+00010604 <D5>:
+ 10604: 00 00 00 00 add\.p gr0,gr0,gr0
+ 10604: R_FRV_32 UD0
+ 10608: 00 00 00 00 add\.p gr0,gr0,gr0
+ 10608: R_FRV_FUNCDESC UFb
+ 1060c: 00 00 00 00 add\.p gr0,gr0,gr0
+ 1060c: R_FRV_32 UFb
+Disassembly of section \.got:
+
+000106a0 <_GLOBAL_OFFSET_TABLE_-0x20>:
+ 106a0: 00 00 05 b4 subx\.p gr0,gr52,gr0,icc1
+ 106a0: R_FRV_FUNCDESC_VALUE UF9
+ 106a4: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106a8: 00 00 05 9c subx\.p gr0,gr28,gr0,icc1
+ 106a8: R_FRV_FUNCDESC_VALUE UF8
+ 106ac: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106b0: 00 00 05 ac subx\.p gr0,gr44,gr0,icc1
+ 106b0: R_FRV_FUNCDESC_VALUE UF0
+ 106b4: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106b8: 00 00 05 a4 subx\.p gr0,gr36,gr0,icc1
+ 106b8: R_FRV_FUNCDESC_VALUE UF7
+ 106bc: 00 00 00 00 add\.p gr0,gr0,gr0
+
+000106c0 <_GLOBAL_OFFSET_TABLE_>:
+ 106c0: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106c4: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106c8: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106cc: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106cc: R_FRV_32 UF1
+ 106d0: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106d0: R_FRV_FUNCDESC UF4
+ 106d4: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106d4: R_FRV_32 UD1
+ 106d8: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106d8: R_FRV_FUNCDESC UF6
+ 106dc: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106dc: R_FRV_FUNCDESC UF5
+ 106e0: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106e0: R_FRV_32 UF3
+ 106e4: 00 00 00 00 add\.p gr0,gr0,gr0
+ 106e4: R_FRV_32 UF2