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| author | Alan Modra <amodra@gmail.com> | 2005-08-15 15:39:48 +0000 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2005-08-15 15:39:48 +0000 |
| commit | 85167a847e75be75d22a57909d384bad806e66ab (patch) | |
| tree | 1cf8759980d9a880793809a4bf9dbc74761c8bc0 /ld/testsuite/ld-frv/fdpic-shared-2.d | |
| parent | d98685ac81121ad2dc5acec4300d9f0833b7bd0f (diff) | |
| download | gdb-85167a847e75be75d22a57909d384bad806e66ab.zip gdb-85167a847e75be75d22a57909d384bad806e66ab.tar.gz gdb-85167a847e75be75d22a57909d384bad806e66ab.tar.bz2 | |
Adjust for dynamic sym changes.
Diffstat (limited to 'ld/testsuite/ld-frv/fdpic-shared-2.d')
| -rw-r--r-- | ld/testsuite/ld-frv/fdpic-shared-2.d | 124 |
1 files changed, 62 insertions, 62 deletions
diff --git a/ld/testsuite/ld-frv/fdpic-shared-2.d b/ld/testsuite/ld-frv/fdpic-shared-2.d index f6179c5..cb4b68d 100644 --- a/ld/testsuite/ld-frv/fdpic-shared-2.d +++ b/ld/testsuite/ld-frv/fdpic-shared-2.d @@ -7,74 +7,74 @@ Disassembly of section \.plt: -000004d8 <\.plt>: - 4d8: 00 00 00 00 add\.p gr0,gr0,gr0 - 4dc: c0 1a 00 06 bra 4f4 <F2-0x10> - 4e0: 00 00 00 10 add\.p gr0,gr16,gr0 - 4e4: c0 1a 00 04 bra 4f4 <F2-0x10> - 4e8: 00 00 00 18 add\.p gr0,gr24,gr0 - 4ec: c0 1a 00 02 bra 4f4 <F2-0x10> - 4f0: 00 00 00 08 add\.p gr0,gr8,gr0 - 4f4: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 - 4f8: 80 30 40 00 jmpl @\(gr4,gr0\) - 4fc: 9c cc ff f8 lddi @\(gr15,-8\),gr14 - 500: 80 30 e0 00 jmpl @\(gr14,gr0\) +[0-9a-f ]+ <\.plt>: +[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 +[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 +[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 +[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +[0-9a-f ]+: 9c cc ff f8 lddi @\(gr15,-8\),gr14 +[0-9a-f ]+: 80 30 e0 00 jmpl @\(gr14,gr0\) Disassembly of section \.text: -00000504 <F2>: - 504: fe 3f ff fe call 4fc <F2-0x8> +[0-9a-f ]+<F2>: +[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F2-0x8> -00000508 <GF0>: - 508: 80 40 f0 10 addi gr15,16,gr0 - 50c: 80 fc 00 24 setlos 0x24,gr0 - 510: 80 f4 00 20 setlo 0x20,gr0 - 514: 80 f8 00 00 sethi hi\(0x0\),gr0 - 518: 80 40 f0 0c addi gr15,12,gr0 - 51c: 80 fc 00 18 setlos 0x18,gr0 - 520: 80 f4 00 14 setlo 0x14,gr0 - 524: 80 f8 00 00 sethi hi\(0x0\),gr0 - 528: 80 40 ff f0 addi gr15,-16,gr0 - 52c: 80 fc ff e8 setlos 0xf*ffffffe8,gr0 - 530: 80 f4 ff e0 setlo 0xffe0,gr0 - 534: 80 f8 ff ff sethi 0xffff,gr0 - 538: 80 40 ff d8 addi gr15,-40,gr0 - 53c: 80 fc ff d8 setlos 0xf*ffffffd8,gr0 - 540: 80 f4 ff d8 setlo 0xffd8,gr0 - 544: 80 f8 ff ff sethi 0xffff,gr0 - 548: 80 f4 00 1c setlo 0x1c,gr0 - 54c: 80 f8 00 00 sethi hi\(0x0\),gr0 -Disassembly of section \.data: +[0-9a-f ]+<GF0>: +[0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0 +[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0 +[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0 +[0-9a-f ]+: 80 fc 00 18 setlos 0x18,gr0 +[0-9a-f ]+: 80 f4 00 14 setlo 0x14,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +[0-9a-f ]+: 80 40 ff f0 addi gr15,-16,gr0 +[0-9a-f ]+: 80 fc ff e8 setlos 0xf*ffffffe8,gr0 +[0-9a-f ]+: 80 f4 ff e0 setlo 0xffe0,gr0 +[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0 +[0-9a-f ]+: 80 40 ff d8 addi gr15,-40,gr0 +[0-9a-f ]+: 80 fc ff d8 setlos 0xf+fd8,gr0 +[0-9a-f ]+: 80 f4 ff d8 setlo 0xffd8,gr0 +[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0 +[0-9a-f ]+: 80 f4 00 1c setlo 0x1c,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +Disassembly of section \.dat[0-9a-f ]+: -000045e4 <D2>: - 45e4: 00 00 00 00 add\.p gr0,gr0,gr0 - 45e4: R_FRV_32 GD0 +[0-9a-f ]+<D2>: +[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+: R_FRV_32 GD0 -000045e8 <GD0>: +[0-9a-f ]+<GD0>: \.\.\. - 45e8: R_FRV_FUNCDESC GFb - 45ec: R_FRV_32 GFb -Disassembly of section \.got: +[0-9a-f ]+: R_FRV_FUNCDESC GFb +[0-9a-f ]+: R_FRV_32 GFb +[0-9A-F ]+isassembly of section \.got: -000045f0 <_GLOBAL_OFFSET_TABLE_-0x20>: - 45f0: 00 00 04 ec addxcc\.p gr0,gr44,gr0,icc1 - 45f0: R_FRV_FUNCDESC_VALUE GF9 - 45f4: 00 00 00 00 add\.p gr0,gr0,gr0 - 45f8: 00 00 04 e4 addxcc\.p gr0,gr36,gr0,icc1 - 45f8: R_FRV_FUNCDESC_VALUE GF8 - 45fc: 00 00 00 00 add\.p gr0,gr0,gr0 - 4600: 00 00 04 f4 addxcc\.p gr0,gr52,gr0,icc1 - 4600: R_FRV_FUNCDESC_VALUE GF7 - 4604: 00 00 00 00 add\.p gr0,gr0,gr0 - 4608: 00 00 04 dc addxcc\.p gr0,gr28,gr0,icc1 - 4608: R_FRV_FUNCDESC_VALUE GF0 - 460c: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: +[0-9a-f ]+: 00 00 04 a4 .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF9 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 9c .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF8 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 ac .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF7 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 94 .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF0 +[0-9a-f ]+: 00 00 00 00 .* -00004610 <_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: \.\.\. - 461c: R_FRV_FUNCDESC GF4 - 4620: R_FRV_32 GF1 - 4624: R_FRV_FUNCDESC GF6 - 4628: R_FRV_FUNCDESC GF5 - 462c: R_FRV_32 GD4 - 4630: R_FRV_32 GF3 - 4634: R_FRV_32 GF2 +[0-9a-f ]+: R_FRV_FUNCDESC GF4 +[0-9a-f ]+: R_FRV_32 GF1 +[0-9a-f ]+: R_FRV_FUNCDESC GF6 +[0-9a-f ]+: R_FRV_FUNCDESC GF5 +[0-9a-f ]+: R_FRV_32 GD4 +[0-9a-f ]+: R_FRV_32 GF3 +[0-9a-f ]+: R_FRV_32 GF2 |