bfd/

	* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
	(bfd_elf32_bigarm_symbian_vec): Likewise.
	(bfd_elf32_bigarm_vxworks_vec): Likewise.
	(bfd_elf32_littlearm_vec): Likewise.
	(bfd_elf32_littlearm_symbian_vec): Likewise.
	(bfd_elf32_littlearm_vxworks_vec): Likewise.
	* configure: Regenerate.
	* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
	(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
	(elf32_arm_vxworks_bed): Add forward declaration.
	(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
	(elf32_arm_vxworks_exec_plt0_entry): New table.
	(elf32_arm_vxworks_exec_plt_entry): Likewise.
	(elf32_arm_vxworks_shared_plt_entry): Likewise.
	(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
	(reloc_section_p): New function.
	(create_got_section): Use RELOC_SECTION.
	(elf32_arm_create_dynamic_sections): Likewise.  Call
	elf_vxworks_create_dynamic_sections for VxWorks targets.
	Choose between the two possible values of plt_header_size
	and plt_entry_size.
	(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
	(elf32_arm_abs12_reloc): New function.
	(elf32_arm_final_link_relocate): Call it.  Allow the creation of
	dynamic R_ARM_ABS12 relocs on VxWorks.  Use reloc_section_p,
	RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION.  Initialize the
	r_addend fields of relocs.  On rela targets, skip any code that
	adjusts in-place addends.  When using _bfd_link_final_relocate
	to perform a final relocation, pass rel->r_addend as the addend
	argument.
	(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
	object, ignore flags that are not standard on VxWorks.
	(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
	relocs on VxWorks.  Use reloc_section_p.
	(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
	(allocate_dynrelocs): Use RELOC_SIZE.  Account for the size of
	.rela.plt.unloaded relocs on VxWorks targets.
	(elf32_arm_size_dynamic_sections): Use RELOC_SIZE.  Check for
	.rela.plt.unloaded as well as .rel(a).plt.  Add DT_RELA* tags
	instead of DT_REL* tags on RELA targets.
	(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle VxWorks
	PLT entries.  Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle DT_RELASZ
	like DT_RELSZ.  Handle the VxWorks form of initial PLT entry.
	Correct the .rela.plt.unreloaded symbol indexes.
	(elf32_arm_output_symbol_hook): Call the VxWorks version of this
	hook on VxWorks targets.
	(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
	Minor formatting tweak.
	(elf32_arm_vxworks_final_write_processing): New function.
	(elf_backend_add_symbol_hook): Override for VxWorks and reset
	for Symbian.
	(elf_backend_final_write_processing): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(ELF_MAXPAGESIZE): Likewise.
	(elf_backend_may_use_rel_p): Minor formatting tweak.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_rela_normal): Likewise.
	* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.

gas/
	* config/tc-arm.c (md_apply_fix): Install a value of zero into a
	BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
	R_ARM_ABS12 reloc.
	(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
	relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
	relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.

gas/testsuite/
	* gas/arm/abs12.s, gas/arm/abs12.d: New test.
	* gas/arm/pic.d: Skip for *-*-vxworks*...
	* gas/arm/pic_vxworks.d: ...use this version instead.
	* gas/arm/unwind_vxworks.d: Fix expected output.

ld/
	* emulparams/armelf_vxworks.sh: Include vxworks.sh.
	(MAXPAGESIZE): Define.
	* emulparams/vxworks.sh: Undefine.
	* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
	* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
	* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
	* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
	* ld-arm/vxworks2-static.sd: New tests.
	* ld-arm/arm-elf.exp: Run them.

13 files changed, 256 insertions, 0 deletions

diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 76a743e..1cb231f 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -16,6 +16,33 @@
 # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 #
 
+if {[istarget "arm-*-vxworks"]} {
+    set armvxworkstests {
+	{"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+	 "" {vxworks1-lib.s}
+	 {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+	  {readelf --symbols vxworks1-lib.nd}}
+	 "libvxworks1.so"}
+	{"VxWorks executable test 1 (dynamic)" \
+	 "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+	 "" {vxworks1.s}
+	 {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+	 "vxworks1"}
+	{"VxWorks executable test 2 (dynamic)" \
+	 "-Tvxworks1.ld -q --force-dynamic"
+	 "" {vxworks2.s}
+	 {{readelf --segments vxworks2.sd}}
+	 "vxworks2"}
+	{"VxWorks executable test 2 (static)"
+	 "-Tvxworks1.ld"
+	 "" {vxworks2.s}
+	 {{readelf --segments vxworks2-static.sd}}
+	 "vxworks2"}
+    }
+    run_ld_link_tests $armvxworkstests
+    run_dump_test "vxworks1-static"
+}
+
 # Exclude non-ARM-ELF targets.
 
 if { ![is_elf_format] || ![istarget "arm*-*-*"] } {
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.dd b/ld/testsuite/ld-arm/vxworks1-lib.dd
new file mode 100644
index 0000000..e13254d
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.dd
@@ -0,0 +1,41 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	e59fc000 	ldr	ip, \[pc, #0\]	; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>
+   80804:	e79cf009 	ldr	pc, \[ip, r9\]
+   80808:	0000000c 	andeq	r0, r0, ip
+   8080c:	e59fc000 	ldr	ip, \[pc, #0\]	; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
+   80810:	e599f008 	ldr	pc, \[r9, #8\]
+   80814:	00000000 	andeq	r0, r0, r0
+   80818:	e59fc000 	ldr	ip, \[pc, #0\]	; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+   8081c:	e79cf009 	ldr	pc, \[ip, r9\]
+   80820:	00000010 	andeq	r0, r0, r0, lsl r0
+   80824:	e59fc000 	ldr	ip, \[pc, #0\]	; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c>
+   80828:	e599f008 	ldr	pc, \[r9, #8\]
+   8082c:	0000000c 	andeq	r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <foo>:
+   80c00:	e92dc200 	stmdb	sp!, {r9, lr, pc}
+   80c04:	e59f9024 	ldr	r9, \[pc, #36\]	; 80c30 <\.text\+0x30>
+   80c08:	e5999000 	ldr	r9, \[r9\]
+   80c0c:	e5999000 	ldr	r9, \[r9\]
+   80c10:	e59f001c 	ldr	r0, \[pc, #28\]	; 80c34 <\.text\+0x34>
+   80c14:	e7991000 	ldr	r1, \[r9, r0\]
+   80c18:	e2811001 	add	r1, r1, #1	; 0x1
+   80c1c:	e7891000 	str	r1, \[r9, r0\]
+   80c20:	eb000004 	bl	80c38 <slocal>
+   80c24:	ebfffefb 	bl	80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+   80c28:	ebfffef4 	bl	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80c2c:	e8bd8200 	ldmia	sp!, {r9, pc}
+   80c30:	00000000 	andeq	r0, r0, r0
+   80c34:	00000014 	andeq	r0, r0, r4, lsl r0
+
+00080c38 <slocal>:
+   80c38:	e1a0f00e 	mov	pc, lr
+
+00080c3c <sglobal>:
+   80c3c:	e1a0f00e 	mov	pc, lr
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.nd b/ld/testsuite/ld-arm/vxworks1-lib.nd
new file mode 100644
index 0000000..edf3db3
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.nd
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.rd b/ld/testsuite/ld-arm/vxworks1-lib.rd
new file mode 100644
index 0000000..c4c46f6
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.rd
@@ -0,0 +1,12 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+0008140c  .*16 R_ARM_JUMP_SLOT   00000000   sexternal \+ 0
+00081410  .*16 R_ARM_JUMP_SLOT   00080c3c   sglobal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 4 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00081c00  00000017 R_ARM_RELATIVE * 00080c38
+00080c0c  .*06 R_ARM_ABS12       00000000   __GOTT_INDEX__ \+ 0
+00080c30  .*02 R_ARM_ABS32       00000000   __GOTT_BASE__ \+ 0
+00081414  .*15 R_ARM_GLOB_DAT    00081800   x \+ 0
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.s b/ld/testsuite/ld-arm/vxworks1-lib.s
new file mode 100644
index 0000000..66dfd1e
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.s
@@ -0,0 +1,36 @@
+	.text
+	.globl	foo
+	.type	foo, %function
+foo:
+	stmfd	sp!, {r9, lr, pc}
+	ldr	r9, 1f
+	ldr	r9, [r9]
+	ldr	r9, [r9, #__GOTT_INDEX__]
+	ldr	r0, 1f + 4
+	ldr	r1, [r9, r0]
+	add	r1, r1, #1
+	str	r1, [r9, r0]
+	bl	slocal(PLT)
+	bl	sglobal(PLT)
+	bl	sexternal(PLT)
+	ldmfd	sp!, {r9, pc}
+1:
+	.word	__GOTT_BASE__
+	.word	x(got)
+	.size	foo, .-foo
+
+	.type	slocal, %function
+slocal:
+	mov	pc,lr
+	.size	slocal, .-slocal
+
+	.globl	sglobal
+	.type	sglobal, %function
+sglobal:
+	mov	pc,lr
+	.size	sglobal, .-sglobal
+
+	.data
+	.4byte	slocal
+
+	.comm	x,4,4
diff --git a/ld/testsuite/ld-arm/vxworks1-static.d b/ld/testsuite/ld-arm/vxworks1-static.d
new file mode 100644
index 0000000..88c0baf
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-static.d
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
diff --git a/ld/testsuite/ld-arm/vxworks1.dd b/ld/testsuite/ld-arm/vxworks1.dd
new file mode 100644
index 0000000..529e3a5
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.dd
@@ -0,0 +1,37 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	e52dc008 	str	ip, \[sp, #-8\]!
+   80804:	e59fc000 	ldr	ip, \[pc, #0\]	; 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+   80808:	e59cf008 	ldr	pc, \[ip, #8\]
+   8080c:	00081400 	andeq	r1, r8, r0, lsl #8
+			8080c: R_ARM_ABS32	_GLOBAL_OFFSET_TABLE_
+   80810:	e59fc000 	ldr	ip, \[pc, #0\]	; 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+   80814:	e59cf000 	ldr	pc, \[ip\]
+   80818:	0008140c 	andeq	r1, r8, ip, lsl #8
+			80818: R_ARM_ABS32	_GLOBAL_OFFSET_TABLE_\+0xc
+   8081c:	e59fc000 	ldr	ip, \[pc, #0\]	; 80824 <_PROCEDURE_LINKAGE_TABLE_\+0x24>
+   80820:	eafffff6 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80824:	00000000 	andeq	r0, r0, r0
+   80828:	e59fc000 	ldr	ip, \[pc, #0\]	; 80830 <_PROCEDURE_LINKAGE_TABLE_\+0x30>
+   8082c:	e59cf000 	ldr	pc, \[ip\]
+   80830:	00081410 	andeq	r1, r8, r0, lsl r4
+			80830: R_ARM_ABS32	_GLOBAL_OFFSET_TABLE_\+0x10
+   80834:	e59fc000 	ldr	ip, \[pc, #0\]	; 8083c <_PROCEDURE_LINKAGE_TABLE_\+0x3c>
+   80838:	eafffff0 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   8083c:	0000000c 	andeq	r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <_start>:
+   80c00:	ebffff08 	bl	80428 <_PROCEDURE_LINKAGE_TABLE_-0x3d8>
+			80c00: R_ARM_PC24	\.plt\+0x20
+   80c04:	eb000000 	bl	80c14 <sexternal\+0x8>
+			80c04: R_ARM_PC24	sexternal\+0xfffffff8
+   80c08:	eaffff00 	b	80408 <_PROCEDURE_LINKAGE_TABLE_-0x3f8>
+			80c08: R_ARM_PC24	\.plt\+0x8
+
+00080c0c <sexternal>:
+   80c0c:	e1a0f00e 	mov	pc, lr
diff --git a/ld/testsuite/ld-arm/vxworks1.ld b/ld/testsuite/ld-arm/vxworks1.ld
new file mode 100644
index 0000000..ec5039d
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.ld
@@ -0,0 +1,30 @@
+SECTIONS
+{
+  . = 0x80000;
+  .interp : { *(.interp) }
+  .hash : { *(.hash) }
+  .dynsym : { *(.dynsym) }
+  .dynstr : { *(.dynstr) }
+
+  . = ALIGN (0x400);
+  .rela.dyn : { *(.rela.dyn) }
+  .rela.plt : { *(.rela.plt) }
+
+  . = ALIGN (0x400);
+  .plt : { *(.plt) }
+
+  . = ALIGN (0x400);
+  .text : { *(.text) }
+
+  . = ALIGN (0x1000);
+  .dynamic : { *(.dynamic) }
+
+  . = ALIGN (0x400);
+  .got : { *(.got.plt) *(.got) }
+
+  . = ALIGN (0x400);
+  .bss : { *(.bss) *(.dynbss) }
+
+  . = ALIGN (0x400);
+  .data : { *(.data) }
+}
diff --git a/ld/testsuite/ld-arm/vxworks1.rd b/ld/testsuite/ld-arm/vxworks1.rd
new file mode 100644
index 0000000..8d7d5cb
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.rd
@@ -0,0 +1,19 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+0008140c  .*16 R_ARM_JUMP_SLOT   00080810   sglobal \+ 0
+00081410  .*16 R_ARM_JUMP_SLOT   00080828   foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
+00080c00  .*01 R_ARM_PC24        00080800   \.plt \+ 20
+00080c04  .*01 R_ARM_PC24        00080c0c   sexternal \+ fffffff8
+00080c08  .*01 R_ARM_PC24        00080800   \.plt \+ 8
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+0008080c  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ 0
+00080818  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ c
+0008140c  .*02 R_ARM_ABS32       00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
+00080830  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ 10
+00081410  .*02 R_ARM_ABS32       00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
diff --git a/ld/testsuite/ld-arm/vxworks1.s b/ld/testsuite/ld-arm/vxworks1.s
new file mode 100644
index 0000000..0139a11
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.s
@@ -0,0 +1,14 @@
+	.text
+	.globl	_start
+	.type	_start, %function
+_start:
+	bl	foo
+	bl	sexternal
+	b	sglobal
+	.size	_start, .-_start
+
+	.globl	sexternal
+	.type	sexternal, %function
+sexternal:
+	mov	pc, lr
+	.size	sexternal, .-sexternal
diff --git a/ld/testsuite/ld-arm/vxworks2-static.sd b/ld/testsuite/ld-arm/vxworks2-static.sd
new file mode 100644
index 0000000..912755b
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2-static.sd
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+  Type .*
+  LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
diff --git a/ld/testsuite/ld-arm/vxworks2.s b/ld/testsuite/ld-arm/vxworks2.s
new file mode 100644
index 0000000..1bd207b
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2.s
@@ -0,0 +1,5 @@
+	.globl	_start
+	.type	_start, %function
+_start:
+	mov	pc, lr
+	.end	_start
diff --git a/ld/testsuite/ld-arm/vxworks2.sd b/ld/testsuite/ld-arm/vxworks2.sd
new file mode 100644
index 0000000..5ff87d3
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2.sd
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+  Type .*
+  PHDR .*
+#...
+  LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+  LOAD .* 0x00081000 0x00081000 .* RW  0x1000
+  DYNAMIC .*
+
+#...