diff options
| author | Will Newton <will.newton@linaro.org> | 2014-06-26 15:23:31 +0100 |
|---|---|---|
| committer | Will Newton <will.newton@linaro.org> | 2014-07-08 15:00:12 +0100 |
| commit | 7572ca8989ead4c3425a1500bc241eaaeffa2c89 (patch) | |
| tree | 4b705caf0c3065950e8df7cb2cb01f8bea230a25 /ld/testsuite/ld-arm | |
| parent | 8335d6aa34b88ce31b62e1b578d54ab4aa364435 (diff) | |
| download | gdb-7572ca8989ead4c3425a1500bc241eaaeffa2c89.zip gdb-7572ca8989ead4c3425a1500bc241eaaeffa2c89.tar.gz gdb-7572ca8989ead4c3425a1500bc241eaaeffa2c89.tar.bz2 | |
ld/ARM: Increase maximum page size to 64kB
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-arm')
| -rw-r--r-- | ld/testsuite/ld-arm/arm-lib.ld | 2 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d | 4 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/ifunc-gdesc.r | 6 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/tls-lib.d | 4 |
4 files changed, 8 insertions, 8 deletions
diff --git a/ld/testsuite/ld-arm/arm-lib.ld b/ld/testsuite/ld-arm/arm-lib.ld index f158c23..f946d0a 100644 --- a/ld/testsuite/ld-arm/arm-lib.ld +++ b/ld/testsuite/ld-arm/arm-lib.ld @@ -75,7 +75,7 @@ SECTIONS .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. */ - . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000); + . = ALIGN (0x10000) - ((0x10000 - .) & (0x10000 - 1)); . = DATA_SEGMENT_ALIGN (0x10000, 0x1000); /* Exception handling */ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d index e2fd8ac..ba1f537 100644 --- a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d +++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d @@ -9,10 +9,10 @@ Disassembly of section \.plt: 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn@plt-0x4> 8e08: e08fe00e add lr, pc, lr 8e0c: e5bef008 ldr pc, \[lr, #8\]! - 8e10: 0000827c \.word 0x0000827c + 8e10: 0001027c \.word 0x0001027c 00008e14 <targetfn@plt>: 8e14: e28fc600 add ip, pc, #0, 12 - 8e18: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 8e18: e28cca10 add ip, ip, #16, 20 ; 0x10000 8e1c: e5bcf27c ldr pc, \[ip, #636\]! ; 0x27c Disassembly of section \.text: diff --git a/ld/testsuite/ld-arm/ifunc-gdesc.r b/ld/testsuite/ld-arm/ifunc-gdesc.r index a49dd2b..20f5ccc 100644 --- a/ld/testsuite/ld-arm/ifunc-gdesc.r +++ b/ld/testsuite/ld-arm/ifunc-gdesc.r @@ -1,6 +1,6 @@ tmpdir/ifunc-gdesc.so: file format elf32-(big|little)arm DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE -0000825c R_ARM_IRELATIVE \*ABS\* -00008248 R_ARM_TLS_DESC \*ABS\* -00008250 R_ARM_TLS_DESC \*ABS\* +0001025c R_ARM_IRELATIVE \*ABS\* +00010248 R_ARM_TLS_DESC \*ABS\* +00010250 R_ARM_TLS_DESC \*ABS\* diff --git a/ld/testsuite/ld-arm/tls-lib.d b/ld/testsuite/ld-arm/tls-lib.d index a299fba..440d1d3 100644 --- a/ld/testsuite/ld-arm/tls-lib.d +++ b/ld/testsuite/ld-arm/tls-lib.d @@ -10,6 +10,6 @@ Disassembly of section .text: .*: e1a00000 nop ; \(mov r0, r0\) .*: e1a00000 nop ; \(mov r0, r0\) .*: e1a0f00e mov pc, lr - .*: 00008098 .word 0x00008098 - .*: 0000808c .word 0x0000808c + .*: 00010098 .word 0x00010098 + .*: 0001008c .word 0x0001008c .*: 00000004 .word 0x00000004 |