aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite/ld-arm/tls-descrelax-v7.d
diff options
context:
space:
mode:
authorNathan Sidwell <nathan@codesourcery.com>2011-01-10 08:40:19 +0000
committerNathan Sidwell <nathan@codesourcery.com>2011-01-10 08:40:19 +0000
commit0855e32bf582698d8995b7e85e144ef105d71c82 (patch)
tree75e1748ec86d1c55cb57d5d4efb62d8d696ec6d0 /ld/testsuite/ld-arm/tls-descrelax-v7.d
parent9a153e0b6fc93873721787f23edceb272ac87994 (diff)
downloadgdb-0855e32bf582698d8995b7e85e144ef105d71c82.zip
gdb-0855e32bf582698d8995b7e85e144ef105d71c82.tar.gz
gdb-0855e32bf582698d8995b7e85e144ef105d71c82.tar.bz2
bfd/
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL, BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ, BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New relocations. * libbfd.h: Rebuilt. * bfd-in2.h: Rebuilt. * elf32-arm.c (elf32_arm_howto_table_1): Add new relocations. (elf32_arm_reloc_map): Likewise. (tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates. (elf32_arm_stub_long_branch_any_tls_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates. (DEF_STUBS): Add new stubs. (struct_elf_arm_obj_data): Add local_tlsdesc_gotent field. (elf32_arm_local_tlsdesc_gotent): New. (GOT_TLS_GDESC): New mask. (GOT_TLS_GD_ANY): Define. (struct elf32_arm_link_hash_entry): Add tlsdesc_got field. (elf32_arm_compute_jump_table_size): New. (struct elf32_arm_link_hash_table): Add next_tls_desc_index, num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline, sgotplt_jump_table_size fields. (elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field. (elf32_arm_link_hash_table_create): Initialize new fields. (arm_type_of_stub): Check TLS desc relocs too. (elf32_arm_stub_name): TLS desc relocs can be shared. (elf32_arm_tls_transition): Determine relaxation. (arm_stub_required_alignment): Add tls stubs. (elf32_arm_size_stubs): Likewise. (elf32_arm_tls_relax): Perform TLS relaxing. (elf32_arm_final_link_relocate): Process TLS DESC relocations. (IS_ARM_TLS_GNU_RELOC): New. (IS_ARM_TLS_RELOC): Use it. (elf32_arm_relocate_section): Perform TLS relaxing. (elf32_arm_check_relocs): Anticipate TLS relaxing, process tls desc relocations. (allocate_dynrelocs): Allocate tls desc relcoations. (elf32_arm_output_arch_local_syms): Emit tls trampoline mapping symbols. (elf32_arm_size_dynamic_sections): Allocate tls trampolines and got slots. (elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE symbol. (elf32_arm_finish_dynamic_symbol): Adjust. (arm_put_trampoline): New. (elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls trampolines. (elf_backend_always_size_sections): Define. include/elf/ * arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL, R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. gas/ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and .tlsdescseq directive. * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc following a symbol. (s_arm_tls_descseq): New directive. (md_pseudo_table): Add it. (encode_branch): Allow TLS_CALL relocs too. (do_t_blx, do_t_branch23): Use encode_branch. (reloc_names): Add tlsdesc and tlscall. (md_apply_fix): Process tls desc relocations. (tc_gen_reloc): Likewise. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/tls.s: Add tlsdesc tests. * gas/arm/tls.d: Adjust. ld/testsuite/ * ld-arm/arm-elf.exp: Added tests for new TLS handling relocations. * ld-arm/tls-descrelax-be32.d: New. * ld-arm/tls-descrelax-be32.s: New. * ld-arm/tls-descrelax-be8.d: New. * ld-arm/tls-descrelax-be8.s: New. * ld-arm/tls-descrelax-v7.d: New. * ld-arm/tls-descrelax-v7.s: New. * ld-arm/tls-descrelax.d: New. * ld-arm/tls-descrelax.s: New. * ld-arm/tls-descseq.d: New. * ld-arm/tls-descseq.r: New. * ld-arm/tls-descseq.s: New. * ld-arm/tls-gdesc-got.d: New. * ld-arm/tls-gdesc-got.s: New. * ld-arm/tls-gdesc-nlazy.g: New. * ld-arm/tls-gdesc-nlazy.s: New. * ld-arm/tls-gdesc.d: New. * ld-arm/tls-gdesc.r: New. * ld-arm/tls-gdesc.s: New. * ld-arm/tls-gdierelax.d: New. * ld-arm/tls-gdierelax.s: New. * ld-arm/tls-gdierelax2.d: New. * ld-arm/tls-gdierelax2.s: New. * ld-arm/tls-gdlerelax.d: New. * ld-arm/tls-gdlerelax.s: New. * ld-arm/tls-lib-loc.d: New. * ld-arm/tls-lib-loc.r: New. * ld-arm/tls-lib-loc.s: New. * ld-arm/tls-longplt-lib.d: New. * ld-arm/tls-longplt-lib.s: New. * ld-arm/tls-longplt.d: New. * ld-arm/tls-longplt.s: New. * ld-arm/tls-mixed.r: New. * ld-arm/tls-mixed.s: New. * ld-arm/tls-thumb1.d: New. * ld-arm/tls-thumb1.s: New. * ld-arm/arm-elf.exp: New.
Diffstat (limited to 'ld/testsuite/ld-arm/tls-descrelax-v7.d')
-rw-r--r--ld/testsuite/ld-arm/tls-descrelax-v7.d108
1 files changed, 108 insertions, 0 deletions
diff --git a/ld/testsuite/ld-arm/tls-descrelax-v7.d b/ld/testsuite/ld-arm/tls-descrelax-v7.d
new file mode 100644
index 0000000..1b2159c
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-descrelax-v7.d
@@ -0,0 +1,108 @@
+.*: file format elf32-.*
+architecture: arm, flags 0x[0-9a-f]+:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x[0-9a-f]+
+
+Disassembly of section .text:
+
+00008000 <foo>:
+ 8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc>
+ 8004: e79f0000 ldr r0, \[pc, r0\]
+ 8008: e320f000 nop \{0\}
+ 800c: 00008138 .word 0x00008138
+ 8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c>
+ 8014: e79f0000 ldr r0, \[pc, r0\]
+ 8018: e320f000 nop \{0\}
+ 801c: 00008128 .word 0x00008128
+ 8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c>
+ 8024: e320f000 nop \{0\}
+ 8028: e320f000 nop \{0\}
+ 802c: 0000000c .word 0x0000000c
+ 8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c>
+ 8034: e1a00000 nop ; .*
+ 8038: e320f000 nop \{0\}
+ 803c: 0000000c .word 0x0000000c
+ 8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54>
+ 8044: e08f0000 add r0, pc, r0
+ 8048: e5901000 ldr r1, \[r0\]
+ 804c: e1a00001 mov r0, r1
+ 8050: e320f000 nop \{0\}
+ 8054: 000080f8 .word 0x000080f8
+ 8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c>
+ 805c: e08f0000 add r0, pc, r0
+ 8060: e5901000 ldr r1, \[r0\]
+ 8064: e1a00001 mov r0, r1
+ 8068: e320f000 nop \{0\}
+ 806c: 000080e0 .word 0x000080e0
+ 8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84>
+ 8074: e320f000 nop \{0\}
+ 8078: e320f000 nop \{0\}
+ 807c: e320f000 nop \{0\}
+ 8080: e320f000 nop \{0\}
+ 8084: 0000000c .word 0x0000000c
+ 8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c>
+ 808c: e1a00000 nop ; .*
+ 8090: e1a00000 nop ; .*
+ 8094: e1a00000 nop ; .*
+ 8098: e320f000 nop \{0\}
+ 809c: 0000000c .word 0x0000000c
+
+000080a0 <bar>:
+ 80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\)
+ 80a2: 4478 add r0, pc
+ 80a4: 6800 ldr r0, \[r0, #0\]
+ 80a6: 46c0 nop ; .*
+ 80a8: 0000809e .word 0x0000809e
+ 80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\)
+ 80ae: 4478 add r0, pc
+ 80b0: 6800 ldr r0, \[r0, #0\]
+ 80b2: 46c0 nop ; \(mov r8, r8\)
+ 80b4: 00008092 .word 0x00008092
+ 80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\)
+ 80ba: 4478 add r0, pc
+ 80bc: 6800 ldr r0, \[r0, #0\]
+ 80be: 46c0 nop ; \(mov r8, r8\)
+ 80c0: 0000808a .word 0x0000808a
+ 80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\)
+ 80c6: 46c0 nop ; \(mov r8, r8\)
+ 80c8: 46c0 nop ; \(mov r8, r8\)
+ 80ca: bf00 nop
+ 80cc: 0000000c .word 0x0000000c
+ 80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\)
+ 80d2: (f3af 8000)|(bf00 ) nop(.w)?
+#...
+ 80d6: 46c0 nop ; \(mov r8, r8\)
+ 80d8: 0000000c .word 0x0000000c
+ 80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\)
+ 80de: (f3af 8000)|(bf00 ) nop(.w)?
+#...
+ 80e2: 46c0 nop ; \(mov r8, r8\)
+ 80e4: 00000014 .word 0x00000014
+ 80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\)
+ 80ea: 4478 add r0, pc
+ 80ec: 6801 ldr r1, \[r0, #0\]
+ 80ee: 1c08 adds r0, r1, #0
+ 80f0: 46c0 nop ; \(mov r8, r8\)
+ 80f2: bf00 nop
+ 80f4: 00008056 .word 0x00008056
+ 80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\)
+ 80fa: 4478 add r0, pc
+ 80fc: 6801 ldr r1, \[r0, #0\]
+ 80fe: 4608 mov r0, r1
+ 8100: 46c0 nop ; \(mov r8, r8\)
+ 8102: bf00 nop
+ 8104: 00008046 .word 0x00008046
+ 8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\)
+ 810a: 46c0 nop ; \(mov r8, r8\)
+ 810c: 46c0 nop ; \(mov r8, r8\)
+ 810e: 46c0 nop ; \(mov r8, r8\)
+ 8110: 46c0 nop ; \(mov r8, r8\)
+ 8112: bf00 nop
+ 8114: 0000000c .word 0x0000000c
+ 8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\)
+ 811a: 46c0 nop ; \(mov r8, r8\)
+ 811c: 46c0 nop ; \(mov r8, r8\)
+ 811e: 46c0 nop ; \(mov r8, r8\)
+ 8120: 46c0 nop ; \(mov r8, r8\)
+ 8122: bf00 nop
+ 8124: 0000000c .word 0x0000000c