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authorNick Clifton <nickc@redhat.com>2009-06-29 08:08:15 +0000
committerNick Clifton <nickc@redhat.com>2009-06-29 08:08:15 +0000
commit05413229fd3a49f190fd6e9eeb6498f412dd9074 (patch)
tree3c8435c7b4dc20f0364d5048713b63aab3b5f710 /ld/testsuite/ld-arm/thumb2-bl-undefweak.d
parenta590713d048e9d3df9227cf98c1fe75b95aa3060 (diff)
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PR 10288
* arm-dis.c (enum opcode_sentinels): New: Used to mark the boundary between variaant and generic coprocessor instuctions. (coprocessor): Use it. Fix architecture version of MCRR and MRRC instructions. (arm_opcdes): Fix patterns for STRB and STRH instructions. (print_insn_coprocessor): Check architecture and extension masks. Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_arm_address): Add a return value of the offset used in the adress, if it is worth printing a hexadecimal version of it. (print_insn_neon): Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_insn_arm): Likewise. (print_insn_thumb16): Likewise. (print_insn_thumb32): Likewise. PR 10297 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description of an undefined instruction. (arm_opcodes): Use it. (thumb_opcod): Use it. (thumb32_opc): Use it. Update expected disassembly regrexps in GAS and LD testsuites.
Diffstat (limited to 'ld/testsuite/ld-arm/thumb2-bl-undefweak.d')
-rw-r--r--ld/testsuite/ld-arm/thumb2-bl-undefweak.d2
1 files changed, 1 insertions, 1 deletions
diff --git a/ld/testsuite/ld-arm/thumb2-bl-undefweak.d b/ld/testsuite/ld-arm/thumb2-bl-undefweak.d
index d06f1ab..32f7cc1 100644
--- a/ld/testsuite/ld-arm/thumb2-bl-undefweak.d
+++ b/ld/testsuite/ld-arm/thumb2-bl-undefweak.d
@@ -6,4 +6,4 @@
Disassembly of section .text:
.* <foo>:
- .*: .... .... blx ... <foo-0x.*>
+ .*: .... .... bl. ... <foo-0x.*>