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authorRichard Henderson <rth@redhat.com>2003-01-22 00:41:59 +0000
committerRichard Henderson <rth@redhat.com>2003-01-22 00:41:59 +0000
commit8b0c8155b226b3baa54c9d27ae02e6687e131a43 (patch)
treed31ebdd9356a45b24b4a1ccc6c5af93baa695570 /ld/testsuite/ld-alpha/tlsbin.dd
parent811daac4022c49191e0988db4a5401f54beb3a00 (diff)
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New TLS tests for Alpha.
Diffstat (limited to 'ld/testsuite/ld-alpha/tlsbin.dd')
-rw-r--r--ld/testsuite/ld-alpha/tlsbin.dd62
1 files changed, 62 insertions, 0 deletions
diff --git a/ld/testsuite/ld-alpha/tlsbin.dd b/ld/testsuite/ld-alpha/tlsbin.dd
new file mode 100644
index 0000000..8dfd97a
--- /dev/null
+++ b/ld/testsuite/ld-alpha/tlsbin.dd
@@ -0,0 +1,62 @@
+#source: align.s
+#source: tlsbinpic.s
+#source: tlsbin.s
+#as:
+#ld: -melf64alpha
+#objdump: -drj.text
+#target: alpha*-*-*
+
+.*: +file format elf64-alpha
+
+Disassembly of section \.text:
+
+0+120001000 <fn2>:
+ 120001000: 02 00 bb 27 ldah gp,2\(t12\)
+ 120001004: d0 91 bd 23 lda gp,-28208\(gp\)
+ 120001008: 3e 15 c2 43 subq sp,0x10,sp
+ 12000100c: 00 00 5e b7 stq ra,0\(sp\)
+ 120001010: 18 80 1d 22 lda a0,-32744\(gp\)
+ 120001014: 08 80 7d a7 ldq t12,-32760\(gp\)
+ 120001018: 00 40 5b 6b jsr ra,\(t12\),12000101c <.*>
+ 12000101c: 02 00 ba 27 ldah gp,2\(ra\)
+ 120001020: b4 91 bd 23 lda gp,-28236\(gp\)
+ 120001024: 38 80 1d 22 lda a0,-32712\(gp\)
+ 120001028: 08 80 7d a7 ldq t12,-32760\(gp\)
+ 12000102c: 00 40 5b 6b jsr ra,\(t12\),120001030 <.*>
+ 120001030: 02 00 ba 27 ldah gp,2\(ra\)
+ 120001034: a0 91 bd 23 lda gp,-28256\(gp\)
+ 120001038: 28 80 1d 22 lda a0,-32728\(gp\)
+ 12000103c: 08 80 7d a7 ldq t12,-32760\(gp\)
+ 120001040: 00 40 5b 6b jsr ra,\(t12\),120001044 <.*>
+ 120001044: 02 00 ba 27 ldah gp,2\(ra\)
+ 120001048: 8c 91 bd 23 lda gp,-28276\(gp\)
+ 12000104c: 21 00 20 20 lda t0,33\(v0\)
+ 120001050: 28 80 1d 22 lda a0,-32728\(gp\)
+ 120001054: 08 80 7d a7 ldq t12,-32760\(gp\)
+ 120001058: 00 40 5b 6b jsr ra,\(t12\),12000105c <.*>
+ 12000105c: 02 00 ba 27 ldah gp,2\(ra\)
+ 120001060: 74 91 bd 23 lda gp,-28300\(gp\)
+ 120001064: 40 00 20 20 lda t0,64\(v0\)
+ 120001068: 46 00 20 20 lda t0,70\(v0\)
+ 12000106c: 00 00 20 24 ldah t0,0\(v0\)
+ 120001070: 4b 00 21 20 lda t0,75\(t0\)
+ 120001074: 10 80 3d a4 ldq t0,-32752\(gp\)
+ 120001078: 01 04 20 40 addq t0,v0,t0
+ 12000107c: 00 00 5e a7 ldq ra,0\(sp\)
+ 120001080: 1e 14 c2 43 addq sp,0x10,sp
+ 120001084: 01 80 fa 6b ret
+
+0+120001088 <_start>:
+ 120001088: 9e 00 00 00 rduniq
+ 12000108c: 09 04 e0 47 mov v0,s0
+ 120001090: 00 80 3d a4 ldq t0,-32768\(gp\)
+ 120001094: 01 04 29 40 addq t0,s0,t0
+ 120001098: 48 80 3d a4 ldq t0,-32696\(gp\)
+ 12000109c: 01 04 29 40 addq t0,s0,t0
+ 1200010a0: 10 00 29 20 lda t0,16\(s0\)
+ 1200010a4: 96 00 29 20 lda t0,150\(s0\)
+ 1200010a8: 00 00 29 24 ldah t0,0\(s0\)
+ 1200010ac: 57 00 21 20 lda t0,87\(t0\)
+ 1200010b0: 50 80 3d a4 ldq t0,-32688\(gp\)
+ 1200010b4: 01 04 29 40 addq t0,s0,t0
+ 1200010b8: 01 80 fa 6b ret