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authorJiong Wang <jiong.wang@arm.com>2015-08-11 21:44:31 +0100
committerJiong Wang <jiong.wang@arm.com>2015-08-11 21:44:31 +0100
commit07f9ddfeba5b572451471f905473f7ddbba1d472 (patch)
treeb3a2c40afe3a4a0e86a2709ef7c79d46cf340a79 /ld/testsuite/ld-aarch64
parent40fbed84815b00960f7fac8d2e7857942df4308c (diff)
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[AArch64] PR18668, repair long branch veneer for plt stub
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-aarch64')
-rw-r--r--ld/testsuite/ld-aarch64/aarch64-elf.exp3
-rw-r--r--ld/testsuite/ld-aarch64/farcall-b-gsym.d5
-rw-r--r--ld/testsuite/ld-aarch64/farcall-b-gsym.s17
-rw-r--r--ld/testsuite/ld-aarch64/farcall-b-plt.d38
-rw-r--r--ld/testsuite/ld-aarch64/farcall-b-plt.s11
-rw-r--r--ld/testsuite/ld-aarch64/farcall-bl-plt.d38
-rw-r--r--ld/testsuite/ld-aarch64/farcall-bl-plt.s12
7 files changed, 124 insertions, 0 deletions
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index c8a8aae..b87b198 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -127,6 +127,9 @@ run_dump_test "limit-b"
run_dump_test "limit-bl"
run_dump_test "farcall-section"
run_dump_test "farcall-back"
+run_dump_test "farcall-b-gsym"
+run_dump_test "farcall-b-plt"
+run_dump_test "farcall-bl-plt"
run_dump_test "farcall-bl"
run_dump_test "farcall-b"
run_dump_test "farcall-b-none-function"
diff --git a/ld/testsuite/ld-aarch64/farcall-b-gsym.d b/ld/testsuite/ld-aarch64/farcall-b-gsym.d
new file mode 100644
index 0000000..eced18e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-gsym.d
@@ -0,0 +1,5 @@
+#name: aarch64-farcall-b-gsym
+#source: farcall-b-gsym.s
+#as:
+#ld: -Ttext 0x1000
+#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar_gsym'.*
diff --git a/ld/testsuite/ld-aarch64/farcall-b-gsym.s b/ld/testsuite/ld-aarch64/farcall-b-gsym.s
new file mode 100644
index 0000000..b7bfe23
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-gsym.s
@@ -0,0 +1,17 @@
+ .global _start
+ .global bar_gsym
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+# for long jump (JUMP26) to global symbol, we shouldn't insert veneer
+# as the veneer will clobber IP0/IP1 which is caller saved, gcc only
+# reserve them for function call relocation (CALL26).
+ b bar_gsym
+ # ((1 << 25) - 1) << 2
+ .skip 134217724, 0
+bar_gsym:
+ nop
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-b-plt.d b/ld/testsuite/ld-aarch64/farcall-b-plt.d
new file mode 100644
index 0000000..9e2c891
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-plt.d
@@ -0,0 +1,38 @@
+#name: aarch64-farcall-b-plt
+#source: farcall-b-plt.s
+#as:
+#ld: -shared
+#objdump: -dr
+#...
+
+Disassembly of section .plt:
+
+.* <foo@plt-0x20>:
+.*: a9bf7bf0 stp x16, x30, \[sp,#-16\]!
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941f611 ldr x17, \[x16,#1000\]
+.*: 910fa210 add x16, x16, #0x3e8
+.*: d61f0220 br x17
+.*: d503201f nop
+.*: d503201f nop
+.*: d503201f nop
+
+.* <foo@plt>:
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941fa11 ldr x17, \[x16,#1008\]
+.*: 910fc210 add x16, x16, #0x3f0
+.*: d61f0220 br x17
+
+Disassembly of section .text:
+
+.* <_start>:
+ ...
+.*: 14000003 b 80002c8 <__foo_veneer>
+.*: d65f03c0 ret
+.*: 14000007 b 80002e0 <__foo_veneer\+.*>
+
+.* <__foo_veneer>:
+.*: 90fc0010 adrp x16, 0 <foo@plt-0x2b0>
+.*: 910ac210 add x16, x16, #0x2b0
+.*: d61f0200 br x16
+ ...
diff --git a/ld/testsuite/ld-aarch64/farcall-b-plt.s b/ld/testsuite/ld-aarch64/farcall-b-plt.s
new file mode 100644
index 0000000..227f5f1
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-plt.s
@@ -0,0 +1,11 @@
+ .global _start
+ .global foo
+ .type foo, @function
+ .text
+_start:
+ # ((1 << 25) - 1) << 2
+ # jump26 relocation out of range to plt stub,
+ # we need long branch veneer.
+ .skip 134217724, 0
+ b foo
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-plt.d b/ld/testsuite/ld-aarch64/farcall-bl-plt.d
new file mode 100644
index 0000000..205a810
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-plt.d
@@ -0,0 +1,38 @@
+#name: aarch64-farcall-bl-plt
+#source: farcall-bl-plt.s
+#as:
+#ld: -shared
+#objdump: -dr
+#...
+
+Disassembly of section .plt:
+
+.* <foo@plt-0x20>:
+.*: a9bf7bf0 stp x16, x30, \[sp,#-16\]!
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941f611 ldr x17, \[x16,#1000\]
+.*: 910fa210 add x16, x16, #0x3e8
+.*: d61f0220 br x17
+.*: d503201f nop
+.*: d503201f nop
+.*: d503201f nop
+
+.* <foo@plt>:
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941fa11 ldr x17, \[x16,#1008\]
+.*: 910fc210 add x16, x16, #0x3f0
+.*: d61f0220 br x17
+
+Disassembly of section .text:
+
+.* <_start>:
+ ...
+.*: 94000003 bl 80002c8 <__foo_veneer>
+.*: d65f03c0 ret
+.*: 14000007 b 80002e0 <__foo_veneer\+.*>
+
+.* <__foo_veneer>:
+.*: 90fc0010 adrp x16, 0 <foo@plt-0x2b0>
+.*: 910ac210 add x16, x16, #0x2b0
+.*: d61f0200 br x16
+ ...
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-plt.s b/ld/testsuite/ld-aarch64/farcall-bl-plt.s
new file mode 100644
index 0000000..2cb0dd0
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-plt.s
@@ -0,0 +1,12 @@
+ .global _start
+ .global foo
+ .type foo, @function
+ .text
+
+_start:
+ # ((1 << 25) - 1) << 2
+ # call26 relocation out of range to plt stub,
+ # we need long branch veneer.
+ .skip 134217724, 0
+ bl foo
+ ret