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| author | Jiong Wang <jiong.wang@arm.com> | 2015-08-12 13:17:50 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-08-12 13:17:50 +0100 |
| commit | 87ad46af87ce0ed30630fdbacf6d8c7a96b2c5b3 (patch) | |
| tree | 69de24ed1bfe809dfa11fec96c9bbd2462dfdea3 /ld/testsuite/ld-aarch64/farcall-b-plt.d | |
| parent | dd419f3aac048176e4e760dc8f29d3429c4f07ce (diff) | |
| download | gdb-87ad46af87ce0ed30630fdbacf6d8c7a96b2c5b3.zip gdb-87ad46af87ce0ed30630fdbacf6d8c7a96b2c5b3.tar.gz gdb-87ad46af87ce0ed30630fdbacf6d8c7a96b2c5b3.tar.bz2 | |
[AArch64] Fix test failures on elf configuration
This patch fixed those failures on elf configuration by:
* Improve the ILP32 target selector "aarch64_choose_ilp32_emul",
makes it more robust. Target triples copied from configure.tgt
* Updated emit-relocs-86/-overflow.d to use aarch64_choose_ilp32_emul
which is following what have done with emit-relocs-28.
* Those instruction encoding mismatch is because those encoding
contains pc-relative address. As for elf, we may have different
start address. relaxed encodind check, especially for
aarch64-farcall-b/bl-plt, as the main purpose of those check are
ELF text/data layout, we just want to make sure veneer to plt stub
is generated.
2015-08-12 Jiong Wang <jiong.wang@arm.com>
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): Support all
four triple shapes: aarch64-*-linux*, aarch64-*-elf,
aarch64_be-*-linux*, aarch64_be-*-elf.
* ld-aarch64/emit-relocs-86.d: Use aarch64_choose_ilp32_emul.
* ld-aarch64/emit-relocs-86-overflow.d: Likewise.
* ld-aarch64/ld-aarch64/farcall-b-plt.d: Relax instrucion encoding
check when they reflect address.
* ld-aarch64/ld-aarch64/farcall-bl-plt.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-aarch64/farcall-b-plt.d')
| -rw-r--r-- | ld/testsuite/ld-aarch64/farcall-b-plt.d | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/ld/testsuite/ld-aarch64/farcall-b-plt.d b/ld/testsuite/ld-aarch64/farcall-b-plt.d index 9e2c891..49c82eb 100644 --- a/ld/testsuite/ld-aarch64/farcall-b-plt.d +++ b/ld/testsuite/ld-aarch64/farcall-b-plt.d @@ -7,32 +7,32 @@ Disassembly of section .plt: -.* <foo@plt-0x20>: +.* <foo@plt.*>: .*: a9bf7bf0 stp x16, x30, \[sp,#-16\]! -.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*> -.*: f941f611 ldr x17, \[x16,#1000\] -.*: 910fa210 add x16, x16, #0x3e8 +.*: .* adrp x16, .* <__foo_veneer\+.*> +.*: .* ldr x17, \[x16,#.*\] +.*: .* add x16, x16, #.* .*: d61f0220 br x17 .*: d503201f nop .*: d503201f nop .*: d503201f nop .* <foo@plt>: -.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*> -.*: f941fa11 ldr x17, \[x16,#1008\] -.*: 910fc210 add x16, x16, #0x3f0 +.*: .* adrp x16, .* <__foo_veneer\+.*> +.*: .* ldr x17, \[x16,#.*\] +.*: .* add x16, x16, #.* .*: d61f0220 br x17 Disassembly of section .text: .* <_start>: ... -.*: 14000003 b 80002c8 <__foo_veneer> +.*: .* b .* <__foo_veneer> .*: d65f03c0 ret -.*: 14000007 b 80002e0 <__foo_veneer\+.*> +.*: .* b .* <__foo_veneer\+.*> .* <__foo_veneer>: -.*: 90fc0010 adrp x16, 0 <foo@plt-0x2b0> -.*: 910ac210 add x16, x16, #0x2b0 +.*: .* adrp x16, 0 <foo@plt.*> +.*: .* add x16, x16, #.* .*: d61f0200 br x16 ... |