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authorJiong Wang <jiong.wang@arm.com>2015-08-11 21:44:31 +0100
committerJiong Wang <jiong.wang@arm.com>2015-08-11 21:44:31 +0100
commit07f9ddfeba5b572451471f905473f7ddbba1d472 (patch)
treeb3a2c40afe3a4a0e86a2709ef7c79d46cf340a79 /ld/testsuite/ld-aarch64/farcall-b-plt.d
parent40fbed84815b00960f7fac8d2e7857942df4308c (diff)
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[AArch64] PR18668, repair long branch veneer for plt stub
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-aarch64/farcall-b-plt.d')
-rw-r--r--ld/testsuite/ld-aarch64/farcall-b-plt.d38
1 files changed, 38 insertions, 0 deletions
diff --git a/ld/testsuite/ld-aarch64/farcall-b-plt.d b/ld/testsuite/ld-aarch64/farcall-b-plt.d
new file mode 100644
index 0000000..9e2c891
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-plt.d
@@ -0,0 +1,38 @@
+#name: aarch64-farcall-b-plt
+#source: farcall-b-plt.s
+#as:
+#ld: -shared
+#objdump: -dr
+#...
+
+Disassembly of section .plt:
+
+.* <foo@plt-0x20>:
+.*: a9bf7bf0 stp x16, x30, \[sp,#-16\]!
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941f611 ldr x17, \[x16,#1000\]
+.*: 910fa210 add x16, x16, #0x3e8
+.*: d61f0220 br x17
+.*: d503201f nop
+.*: d503201f nop
+.*: d503201f nop
+
+.* <foo@plt>:
+.*: 90040090 adrp x16, 8010000 <__foo_veneer\+.*>
+.*: f941fa11 ldr x17, \[x16,#1008\]
+.*: 910fc210 add x16, x16, #0x3f0
+.*: d61f0220 br x17
+
+Disassembly of section .text:
+
+.* <_start>:
+ ...
+.*: 14000003 b 80002c8 <__foo_veneer>
+.*: d65f03c0 ret
+.*: 14000007 b 80002e0 <__foo_veneer\+.*>
+
+.* <__foo_veneer>:
+.*: 90fc0010 adrp x16, 0 <foo@plt-0x2b0>
+.*: 910ac210 add x16, x16, #0x2b0
+.*: d61f0200 br x16
+ ...