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author | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2015-02-24 12:04:41 +0000 |
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committer | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2015-04-01 13:16:38 +0100 |
commit | 4106101c449e53dd6b61ec824b196f84b3f3daa5 (patch) | |
tree | 4adf977e421b6453ead4a941effac892d0cffa87 /ld/emultempl | |
parent | cf39cfc52ebd683d55fc396a77355f34b5094c04 (diff) | |
download | gdb-4106101c449e53dd6b61ec824b196f84b3f3daa5.zip gdb-4106101c449e53dd6b61ec824b196f84b3f3daa5.tar.gz gdb-4106101c449e53dd6b61ec824b196f84b3f3daa5.tar.bz2 |
[AArch64] Workaround for Cortex A53 erratum 843419
Some early revisions of the Cortex-A53 have an erratum (843419). The
details of the erratum are quite complex and involve dynamic
conditions. For the purposes of the workaround we have simplified the
static conditions to an ADRP in the last two instructions of a 4KByte
page, followed within four instructions by a load/store dependent on
the ADRP.
This patch adds support to conservatively scan for and workaround
Cortex A53 erratum 843419. There are two different workaround
strategies used. The first is to rewrite ADRP instructions which form
part of an erratum sequence with an ADR instruction. In situations
where the ADR provides insufficient offset the dependent load or store
instruction from the sequence is moved to a stub section and branches
are inserted from the original sequence to the relocated instruction
and back again.
Stub section sizes are rounded up to a multiple of 4096 in order to
ensure that the act of inserting work around stubs does not create
more errata sequences.
Workaround stubs are always inserted into the stub section associated
with the input section containing the erratum sequence. This ensures
that the fully relocated form of the veneered load store instruction
is available at the point in time when the stub section is written.
Diffstat (limited to 'ld/emultempl')
-rw-r--r-- | ld/emultempl/aarch64elf.em | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/ld/emultempl/aarch64elf.em b/ld/emultempl/aarch64elf.em index 75f04a7..313263a 100644 --- a/ld/emultempl/aarch64elf.em +++ b/ld/emultempl/aarch64elf.em @@ -31,6 +31,7 @@ static int no_enum_size_warning = 0; static int no_wchar_size_warning = 0; static int pic_veneer = 0; static int fix_erratum_835769 = 0; +static int fix_erratum_843419 = 0; static void gld${EMULATION_NAME}_before_parse (void) @@ -303,7 +304,8 @@ aarch64_elf_create_output_section_statements (void) bfd_elf${ELFSIZE}_aarch64_set_options (link_info.output_bfd, &link_info, no_enum_size_warning, no_wchar_size_warning, - pic_veneer, fix_erratum_835769); + pic_veneer, + fix_erratum_835769, fix_erratum_843419); stub_file = lang_add_input_file ("linker stubs", lang_input_file_is_fake_enum, @@ -353,6 +355,7 @@ PARSE_AND_LIST_PROLOGUE=' #define OPTION_STUBGROUP_SIZE 311 #define OPTION_NO_WCHAR_SIZE_WARNING 312 #define OPTION_FIX_ERRATUM_835769 313 +#define OPTION_FIX_ERRATUM_843419 314 ' PARSE_AND_LIST_SHORTOPTS=p @@ -364,6 +367,7 @@ PARSE_AND_LIST_LONGOPTS=' { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE }, { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING}, { "fix-cortex-a53-835769", no_argument, NULL, OPTION_FIX_ERRATUM_835769}, + { "fix-cortex-a53-843419", no_argument, NULL, OPTION_FIX_ERRATUM_843419}, ' PARSE_AND_LIST_OPTIONS=' @@ -382,6 +386,7 @@ PARSE_AND_LIST_OPTIONS=' the linker should choose suitable defaults.\n" )); fprintf (file, _(" --fix-cortex-a53-835769 Fix erratum 835769\n")); + fprintf (file, _(" --fix-cortex-a53-843419 Fix erratum 843419\n")); ' PARSE_AND_LIST_ARGS_CASES=' @@ -405,6 +410,10 @@ PARSE_AND_LIST_ARGS_CASES=' fix_erratum_835769 = 1; break; + case OPTION_FIX_ERRATUM_843419: + fix_erratum_843419 = 1; + break; + case OPTION_STUBGROUP_SIZE: { const char *end; |