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authorNick Clifton <nickc@redhat.com>2016-11-01 16:45:57 +0000
committerNick Clifton <nickc@redhat.com>2016-11-01 16:45:57 +0000
commite23eba971dd409b999dd83d8df0f842680c1c642 (patch)
tree0002ef536e33bff13648ee1f2c419349f4f91d75 /ld/configure.tgt
parent4e56efac8b4d5e251e8edc13febec93992bd6eb4 (diff)
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Add support for RISC-V architecture.
bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
Diffstat (limited to 'ld/configure.tgt')
-rw-r--r--ld/configure.tgt6
1 files changed, 6 insertions, 0 deletions
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 6f3cd4f..c196e68 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -679,6 +679,12 @@ powerpc-*-aix*) targ_emul=aixppc ;;
powerpc-*-beos*) targ_emul=aixppc ;;
powerpc-*-windiss*) targ_emul=elf32ppcwindiss ;;
powerpc-*-lynxos*) targ_emul=ppclynx ;;
+riscv32*-*-*) targ_emul=elf32lriscv
+ targ_extra_emuls="elf64lriscv"
+ targ_extra_libpath=$targ_extra_emuls ;;
+riscv64*-*-*) targ_emul=elf64lriscv
+ targ_extra_emuls="elf32lriscv"
+ targ_extra_libpath=$targ_extra_emuls ;;
rs6000-*-aix[5-9]*) targ_emul=aix5rs6 ;;
rs6000-*-aix*) targ_emul=aixrs6
;;