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authorH.J. Lu <hjl.tools@gmail.com>2017-05-11 11:26:26 -0700
committerH.J. Lu <hjl.tools@gmail.com>2017-05-11 11:28:16 -0700
commitf2c29a169242d0c564afb46ecaf160422b28bfbb (patch)
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parentdc2be3d2f6de530aac40983e79e29e050f40e759 (diff)
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x86-64: Rename .plt.bnd to .plt.sec
Rename .plt.bnd to .plt.sec to indicate that this is used as the second PLT section. There is no change in run-time behavior. We also scan the .plt.sec section to synthesize PLT symbols. bfd/ * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd to plt_second. (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame to plt_second/plt_second_eh_frame. (elf_x86_64_link_hash_newfunc): Updated. (elf_x86_64_allocate_dynrelocs): Likewise. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_finish_dynamic_symbol): Likewise. (elf_x86_64_finish_dynamic_sections): Likewise. (elf_x86_64_plt_type): Rename plt_bnd to plt_second. (elf_x86_64_get_synthetic_symtab): Updated. Also scan the .plt.sec section. (elf_backend_setup_gnu_properties): Updated. Create the .plt.sec section instead of the .plt.sec section. ld/ * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace .plt.bnd with .plt.sec. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/mpx3.dd: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
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2017-05-11 H.J. Lu <hongjiu.lu@intel.com>
+ * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace
+ .plt.bnd with .plt.sec.
+ * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
+ * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
+ * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
+ * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
+ * testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
+ * testsuite/ld-x86-64/mpx3.dd: Likewise.
+ * testsuite/ld-x86-64/mpx3n.dd: Likewise.
+ * testsuite/ld-x86-64/mpx4.dd: Likewise.
+ * testsuite/ld-x86-64/mpx4n.dd: Likewise.
+ * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise.
+ * testsuite/ld-x86-64/pr21038b-now.d: Likewise.
+ * testsuite/ld-x86-64/pr21038b.d: Likewise.
+ * testsuite/ld-x86-64/pr21038c-now.d: Likewise.
+ * testsuite/ld-x86-64/pr21038c.d: Likewise.
+
+2017-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
* testsuite/ld-i386/plt-pic2.dd: Updated.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/plt2.rd: Likewise.